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    • 1. 发明授权
    • Automatic selection of a special mode of operation in multi-channel test
equipment
    • 自动选择多通道测试设备的特殊操作模式
    • US6131175A
    • 2000-10-10
    • US15738
    • 1998-01-29
    • Richard A. Nygaard, Jr.
    • Richard A. Nygaard, Jr.
    • G01R31/28
    • G01R31/2834
    • Multi-channel measurement equipment enters or performs a special mode of operation in response to an arbitrarily chosen probe being momentarily touched to a special terminal. A signal identifiable by its uncommon properties is present at the special terminal. The uncommon signal is generated by a suitable circuit, which may be similar to a pseudo random sequence generator. Each channel is equipped with a recognition circuit that recognizes the presence of the uncommon signal. The recognition circuits each receive a copy of the uncommon ID signal, and the task of recognition is performed by pattern matching over time. To enter or perform the special mode the operator touches the probe to the special terminal. After a suitable but brief period of time the recognition circuit for that probe produces an output that indicates recognition. The measurement equipment responds by entering or performing the special mode of operation. The special mode of operation may be ended by touching again touching the probe to the special terminal, by some other manual action, such as a keystroke or mouse click, or by some other event within the context of the special mode.
    • 多通道测量设备响应于任意选择的探头瞬间触摸到特殊终端进入或执行特殊操作模式。 通过其不常见特性可识别的信号存在于特殊终端。 不常见的信号由合适的电路产生,该电路可以类似于伪随机序列发生器。 每个通道都配备有识别不常见信号的识别电路。 识别电路各自接收不常见ID信号的副本,并且通过随时间的模式匹配来执行识别任务。 要进入或执行特殊模式,操作员将探头接触到特殊端子。 在适当但短暂的时间段之后,该探头的识别电路产生指示识别的输出。 测量设备通过输入或执行特殊操作模式进行响应。 可以通过一些其他手动操作(例如按键或鼠标点击)或在特殊模式的上下文中的某些其他事件触摸再次触摸探头到特殊终端来结束特殊操作模式。
    • 2. 发明授权
    • Method and apparatus for determining if a digital value lies within a
range
    • 用于确定数字值是否在范围内的方法和装置
    • US4633410A
    • 1986-12-30
    • US758183
    • 1985-07-23
    • Richard A. Nygaard, Jr.Fredrick J. Palmer
    • Richard A. Nygaard, Jr.Fredrick J. Palmer
    • G06F7/02G06F15/00
    • G06F7/026
    • An n-bit input value is partitioned into groups of most significant and least significant bits. Each group respectively describes integers J and K that comprise the input value; J and K need not each have the same radix. J and K are applied as addresses to respective Random Access Memories (RAM's). Each RAM is previously pre-loaded with information specific to the range or ranges to be detected, and each outputs respective J- and K-type information as a function of the applied J and K. The J- and K-type information is merged together and applied as an address to a third RAM whose output indicates which range, if any, the input value lies within. The output of the third RAM can be in either a bit-per-range format or a range-per-code format. The former is faster and accommodates arbitrary ranges, while the latter allows recognition of significantly more disjoint ranges at the expense of the extra time required for subsequent interpretation of the range code. Mixtures of the two types of ranges are possible using the range-per-code format.
    • n位输入值被划分为最高有效位和最低有效位的组。 每组分别表示包含输入值的整数J和K; J和K不需要每个都有相同的基数。 J和K作为地址应用于各自的随机存取存储器(RAM)。 每个RAM预先预先载入要检测的范围或范围的信息,并且每个RAM作为所应用的J和K的函数输出各自的J和K型信息。合并J型和K型信息 一起并作为地址应用于第三RAM,其输出指示输入值在哪个范围内(如果有的话)。 第三RAM的输出可以是每范围的格式或每个码范围的格式。 前者更快,适应任意范围,而后者允许以明显更多的不相交范围的识别,而代价是随后解释范围代码所需的额外时间。 两种类型的范围的混合可以使用每个代码范围的格式。
    • 3. 发明授权
    • Multiple probe test equipment with channel identification
    • 具有通道识别功能的多探头测试设备
    • US6052807A
    • 2000-04-18
    • US996979
    • 1997-12-23
    • Richard A. Nygaard, Jr.
    • Richard A. Nygaard, Jr.
    • G01R1/073G01R31/3177G01R31/319G01R31/28
    • G01R1/073G01R31/3177G01R31/318385G01R31/31908
    • Multi-channel measurement equipment identifies probe-to-channel correspondence by providing an identification (ID) terminal that can be touched by a probe whose channel correspondence is sought. A ID signal identifiable by its uncommon properties is present at the ID terminal. The uncommon ID signal is generated by a suitable circuit, which may be similar to pseudo random sequence generator. Each channel is equipped with a recognition circuit that recognizes the presence of the uncommon ID signal. The recognition circuits each receive a copy of the uncommon ID signal, and the task of recognition is performed by pattern matching over time. To discover a probe's channel identity the operator touches the probe to the ID terminal. After a suitable but brief period of time the recognition circuit for that probe produces an output that indicates recognition. The measurement equipment may display a message on a screen to the effect that the system has noticed that the probe for channel "X" is on the ID terminal.
    • 多通道测量设备通过提供可以被寻找通道对应的探头触摸的识别(ID)终端来识别探测到通道对应。 身份识别码终端上存在可被其不常见属性识别的ID信号。 不常见的ID信号由合适的电路产生,其可以类似于伪随机序列发生器。 每个通道配备有识别不常见的ID信号的识别电路。 识别电路各自接收不常见ID信号的副本,并且通过随时间的模式匹配来执行识别任务。 为了发现探头的通道标识,操作者将探头连接至ID终端。 在适当但短暂的时间段之后,该探头的识别电路产生指示识别的输出。 测量设备可能会在屏幕上显示一条消息,表示系统已经注意到通道“X”的探头位于ID终端上。
    • 8. 发明授权
    • System and method for measuring and depicting performance of a serial communications link
    • 用于测量和描绘串行通信链路性能的系统和方法
    • US07870445B2
    • 2011-01-11
    • US11962607
    • 2007-12-21
    • Robert SaponasRichard A. Nygaard, Jr.
    • Robert SaponasRichard A. Nygaard, Jr.
    • G06F11/08G06F11/24
    • G01R31/3171
    • A system for measuring performance of a serial communications link includes a system under test including at least one transmitter and at least one receiver coupled together via a serial data communications link, wherein at least one of the transmitter and the receiver has at least one tunable parameter, at least one controller coupled to at least one of a transmitter and a receiver via a joint test action group JTAG interface, and logic configured to perform a bit error ratio test (BERT) at a plurality of receiver phase locations over a defined time period and concluding the BERT for a particular phase location if a BERT error count is greater than 0 at the particular phase location.
    • 用于测量串行通信链路的性能的系统包括被测系统,包括至少一个发射机和经由串行数据通信链路耦合在一起的至少一个接收机,其中发射机和接收机中的至少一个具有至少一个可调谐参数 ,经由联合测试动作组JTAG接口耦合到发射器和接收器中的至少一个的至少一个控制器,以及被配置为在所定义的时间段内在多个接收器相位位置执行误比特率测试(BERT)的逻辑 并且如果特定相位位置上的BERT错误计数大于0,则针对特定相位位置结束BERT。
    • 9. 发明授权
    • Forced-alignment measurement tools for composite eye diagrams
    • 复合眼图的强制对准测量工具
    • US07386406B2
    • 2008-06-10
    • US10699353
    • 2003-10-31
    • Richard A. Nygaard, Jr.
    • Richard A. Nygaard, Jr.
    • G06F19/00
    • H04L1/24G01R13/029
    • An original composite eye diagram is reformulated by deliberately re-aligning its component eye diagrams according to some appropriate standard. This ‘forced-alignment’ shifts the components in one or both of the time and voltage axes. Notice is taken of the shift(s) for each channel, and that shift data is appended to the data structures for the original components. The content of the data structure can be read in its original form, or, read and force-aligned. A force-aligned composite eye diagram created from the re-aligned components can then be displayed, investigated and evaluated with any of the existing tools that used to analyze eye diagrams, simply by instructing the process that read a component eye diagram structure to reform that component as it is being read.
    • 根据一些适当的标准,通过故意重新对齐其组件眼图来重新制定原始复合眼图。 这种“强制对准”会在一个或两个时间轴和电压轴上移动组件。 注意每个通道的移位,并且将移位数据附加到原始组件的数据结构。 数据结构的内容可以以其原始形式读取,或者读取和强制对齐。 然后,可以使用用于分析眼图的任何现有工具来显示,调查和评估从重新对齐的组件创建的强制对齐复合眼图,只需指示读取组件眼图结构来改进该眼图的过程即可 组件正在读取。
    • 10. 发明授权
    • System and method for comparing values during logic analysis
    • 逻辑分析期间比较值的系统和方法
    • US06191683B1
    • 2001-02-20
    • US09386614
    • 1999-08-31
    • Richard A. Nygaard, Jr.
    • Richard A. Nygaard, Jr.
    • G05B100
    • G06F7/02
    • Disclosed is a system and method to compare logical values. The system employs a field programmable gate array (FPGA) configured for comparing logical values. The FPGA includes a number of inputs to receive an N-bit sampled value from a target system, where N defines the number of bits in the N-bit sampled value. The FPGA also includes a number of lookup tables configured to receive an M-bit portion of the N-bit sampled value. These lookup tables generate a lookup table output in response to the M-bit portion. Finally, an AND operation is performed on the outputs of the lookup tables that generates an output indicating whether the particular N-bit logical value matches a particular desired value. Note that a single AND gate may be used or a number of AND gates may be used in place of the single AND gate. The tables within the lookup tables are generated based upon a desired logical value and a comparison mask value.
    • 公开了用于比较逻辑值的系统和方法。 该系统采用配置用于比较逻辑值的现场可编程门阵列(FPGA)。 FPGA包括多个输入,用于从目标系统接收N位采样值,其中N定义N位采样值中的位数。 FPGA还包括多个查找表,其被配置为接收N位采样值的M位部分。 这些查找表生成响应于M位部分的查找表输出。 最后,对产生指示特定N位逻辑值是否匹配特定期望值的输出的查找表的输出执行AND运算。 注意,可以使用单个AND门,或者可以使用多个AND门来代替单个AND门。 查找表中的表根据所需的逻辑值和比较掩码值生成。