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    • 8. 发明授权
    • Temperature compensation apparatus for logic gates
    • 逻辑门温度补偿装置
    • US5144405A
    • 1992-09-01
    • US744311
    • 1991-08-13
    • John F. Naber
    • John F. Naber
    • H01L27/02
    • H01L27/0211H01L2924/0002
    • A temperature compensation circuit enables the reliable operation of semiconductor logic gates over wide temperature ranges. The temperature compensation circuit includes a thin film resistor in series with an implanted resistor, both located on the same semiconductor substrate and both having one terminal connected together. The other terminal of one of the resistors is coupled to a point of reference potential, while the other terminal of the other resistor is coupled to an operating potential. A voltage is provided at the junction between the two resistors, which voltage is coupled to the logic gates. The voltage serves as a pull-down source and tracks over the wide temperature range to enable the logic gate to reliably operate with an adequate noise margin over temperature ranges between -55.degree. C. to +125.degree. C.
    • 温度补偿电路使得半导体逻辑门在宽温度范围内可靠运行。 温度补偿电路包括与注入电阻器串联的薄膜电阻器,两者都位于相同的半导体衬底上,并且两者都具有一个端子连接在一起。 一个电阻器的另一个端子耦合到参考电位点,而另一个电阻器的另一个端子耦合到工作电位。 在两个电阻之间的结处提供电压,该电压被耦合到逻辑门。 该电压用作下拉源,并在宽温度范围内进行跟踪,以使逻辑门能够在-55℃至+125℃之间的温度范围内以足够的噪声容限可靠地工作。
    • 9. 发明授权
    • Temperature and supply insensitive TTL or CMOS to 0/-5 V translator
    • 温度和电源不敏感TTL或CMOS到0 / -5 V转换器
    • US5420527A
    • 1995-05-30
    • US223544
    • 1994-04-06
    • John F. Naber
    • John F. Naber
    • H03K19/003H03K19/0185H03K19/0175
    • H03K19/00384H03K19/018535
    • Voltage translator apparatus to translate TTL or CMOS logic level inputs to 0/-5 V logic levels that is insensitive to temperative and bias supply variation. A unique circuit structure comprises a level shift stage employing transistors configured to level shift a source of operating potential to a controlling potential to be applied to a predriver stage. The controlling potential is a function of the input logic levels. The predriver stage drives an output stage capable of providing complementary 0/-5 V logic outputs. The configuration is such as to afford low power consumption as well as proper operation over wide bias supply and temperature ranges.
    • 电压转换器将TTL或CMOS逻辑电平输入转换为对温度和偏置电源变化不敏感的0 / -5 V逻辑电平。 独特的电路结构包括电平移位级,其使用被配置为将操作电位源平移到控制电位的晶体管,以施加到预驱动级。 控制电位是输入逻辑电平的函数。 预驱动级驱动能够提供互补的0 / -5 V逻辑输出的输出级。 该配置是为了在宽的偏压供应和温度范围内提供低功耗以及适当的操作。