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1. 发明授权

US08165184B2 Apparatus and method for synthesizing and generating an SSC modulated signal 有权
标题翻译：用于合成和产生SSC调制信号的装置和方法
公开(公告)号：US08165184B2
公开(公告)日：2012-04-24
申请号：US12321379
申请日：2009-01-17
申请人： Ramachandra Cv , Mark L. Guenther , John C. Calvin
发明人： Ramachandra Cv , Mark L. Guenther , John C. Calvin
IPC分类号： H04B1/00
CPC分类号： H04B1/69
摘要： An Arbitrary Waveform Generator (AWG) synthesizes and generates an SSC modulated signal by generating a modulating waveform with a frequency of an SSC modulation frequency, calculating the number of samples per data bit (SPUI) as a ratio of an upsampling frequency to a data rate of a data stream, calculating an amplification factor as the ratio of SSC deviation frequency to data rate of the data stream, generating the array of SSC Edges containing the edge variation with respect to single sample per bit, multiplying the amplification factor to the modulating waveform, generating an array of SSC Edges Upsampled, containing edge variations with respect to an Upsample factor per bit, and multiplying SSC Edges with SPUI; calculating the resultant bit duration SSC Bit Duration as the sum of SSC Edges Upsampled and SPU, and calculating the successive summation of SSC Bit Duration, to get SSC Bit Position.
摘要翻译：任意波形发生器（AWG）通过产生具有SSC调制频率的频率的调制波形来合成并产生SSC调制信号，将每个数据比特的采样数（SPUI）计算为上采样频率与数据速率的比率计算一个放大系数作为数据流的SSC偏差频率与数据速率的比率，生成包含相对于每个单个样本的边缘变化的SSC边缘阵列，将放大系数乘以调制波形产生一个SSC Edges的上行阵列，其中包含相对于每位Upsample因子的边缘变化，并将SSC边与SPUI相乘; 计算结果位持续时间SSC位持续时间作为上升采样和SPU的SSC边的和，并计算SSC位持续时间的连续求和，以获得SSC位位置。

2. 发明申请

US20090207886A1 Apparatus and method for synthesizing and generating an SSC modulated signal 有权
标题翻译：用于合成和产生SSC调制信号的装置和方法
公开(公告)号：US20090207886A1
公开(公告)日：2009-08-20
申请号：US12321379
申请日：2009-01-17
申请人： Ramachandra CV , Mark L. Guenther , John C. Calvin
发明人： Ramachandra CV , Mark L. Guenther , John C. Calvin
IPC分类号： H04B1/69
CPC分类号： H04B1/69
摘要： A system and method for synthesizing and generating the SSC modulated signal with precision and in a controlled manner is provided. In one embodiment the system may be integrated in an arbitrary waveform generator.
摘要翻译：提供了一种用于以精确和可控的方式合成和生成SSC调制信号的系统和方法。在一个实施例中，系统可以集成在任意波形发生器中。

3. 发明授权

US07191079B2 Oscilloscope having advanced triggering capability 有权
标题翻译：示波器具有先进的触发能力
公开(公告)号：US07191079B2
公开(公告)日：2007-03-13
申请号：US11089883
申请日：2005-03-23
申请人： Patrick A. Smith , Que Thuy Tran , John C. Delacy , Daniel G. Knierim , David L. Kelly , John C. Calvin
发明人： Patrick A. Smith , Que Thuy Tran , John C. Delacy , Daniel G. Knierim , David L. Kelly , John C. Calvin
IPC分类号： G01R13/00
CPC分类号： G01R13/32 , G01R13/0254
摘要： An advanced trigger circuit includes two trigger decoders, each triggering on one of respective pluralities of continuous-time trigger events. In one embodiment, a programmable timer begins timing in response to an output signal of the first trigger decoder and generates an end-of-time signal at the expiration of its time period. A reset circuit resets the first trigger decoder if the second selected continuous-time trigger event failed to occur before the end-of-time signal was generated. In another embodiment, a reset decoder generates a reset signal in response to an occurrence of a selected continuous-time trigger event. The reset circuit is responsive to the reset signal for resetting the first trigger decoder if the second selected continuous-time trigger event failed to occur before the reset signal was generated. In other embodiments, the advanced trigger circuit triggers on a serial lane skew violation or on a beacon width violation.
摘要翻译：高级触发电路包括两个触发解码器，每个触发解码器在相应的多个连续时间触发事件之一上触发。在一个实施例中，可编程定时器响应于第一触发解码器的输出信号开始定时，并且在其时间段期满时产生结束时间信号。如果在生成结束时间信号之前第二次选择的连续时间触发事件不能发生，则复位电路复位第一触发解码器。在另一个实施例中，复位解码器响应于所选择的连续时间触发事件的发生而产生复位信号。如果在产生复位信号之前第二选择的连续时间触发事件不能发生，则复位电路响应于复位信号来复位第一触发解码器。在其他实施例中，高级触发电路在串行通道偏斜违规或信标宽度冲突时触发。

4. 发明授权

US07912117B2 Transport delay and jitter measurements 有权
标题翻译：传输延迟和抖动测量
公开(公告)号：US07912117B2
公开(公告)日：2011-03-22
申请号：US11529856
申请日：2006-09-28
申请人： Kan Tan , John C. Calvin , Kalev Sepp
发明人： Kan Tan , John C. Calvin , Kalev Sepp
IPC分类号： H04B3/46
CPC分类号： H04L1/205 , G01R29/26 , G01R31/31709
摘要： A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset between the two waveforms is computed. The jitter from the two test points is filtered and a mean-removed cross-correlation coefficient is computed from the filtered jitters. A fractional delay is computed using interpolation based on LMS error, and the respective computational components are summed to compute a transport delay between the two test points. The transport delay may be used to adjust clock edges from one waveform for comparison with data transition edges of the other waveform to measure jitter.
摘要翻译：使用互相关的实时示波器测量传输延迟和抖动的方法从被测系统的两个测试点获取波形。在两个波形上运行时钟恢复以获得相应的速率和偏移量。计算两个波形之间的时间偏移。对两个测试点的抖动进行滤波，并从滤波的抖动中计算平均去除的互相关系数。使用基于LMS误差的插值计算分数延迟，并将相应的计算组件相加以计算两个测试点之间的传输延迟。传输延迟可用于从一个波形调整时钟边沿，以便与其他波形的数据转换边沿进行比较，以测量抖动。

5. 发明授权

US06836738B2 Method for optimized rendering of eye diagrams synchronized to a recovered clock and based on a single shot acquisition 有权
标题翻译：用于优化与恢复的时钟同步并基于单次采集的眼图的渲染方法
公开(公告)号：US06836738B2
公开(公告)日：2004-12-28
申请号：US10389545
申请日：2003-03-14
申请人： Kalev Sepp , John C. Calvin
发明人： Kalev Sepp , John C. Calvin
IPC分类号： G01R2902
CPC分类号： G01R13/029
摘要： A first method for rendering an eye diagram synchronized to a recovered clock and based on a single shot acquisition of a digital storage oscilloscope, acquires a waveform and measures the timing of its edges. It then estimates the symbol rate of the waveform and derives clock signals in accordance with the edge timing and the estimated symbol rate. The waveform data is then sliced into frames with respect to the derived clock signals, and the frames are partially overlapped and aligned to form an eye diagram. In a second embodiment of the invention, the frames are aligned, without being overlapped, to form an eye diagram.
摘要翻译：用于渲染与恢复的时钟同步并基于数字存储示波器的单次采集的眼图的第一种方法，获取波形并测量其边缘的定时。然后，它估计波形的符号率并根据边沿定时和估计的符号率导出时钟信号。然后将波形数据相对于导出的时钟信号切片成帧，并且将帧部分地重叠并对准以形成眼图。在本发明的第二实施例中，框架被对准而不重叠以形成眼图。

6. 发明申请

US20110235694A1 Apparatus and Method for Generating a Waveform Test Signal Having Crest Factor Emulation of Random Jitter 审中-公开
标题翻译：用于产生具有随机抖动的峰值因数仿真的波形测试信号的装置和方法
公开(公告)号：US20110235694A1
公开(公告)日：2011-09-29
申请号：US12973709
申请日：2010-12-20
申请人： Ransom W. Stephens , Muralidharan Karapattu , Sampathkumar R. Desai , John C. Calvin
发明人： Ransom W. Stephens , Muralidharan Karapattu , Sampathkumar R. Desai , John C. Calvin
IPC分类号： H04B17/00
CPC分类号： G01R31/31709
摘要： A signal generating device has a display and a central processing unit for setting parameters for a serial data pattern and parameters for deterministic and random jitter impairments, and a displacement crest factor emulation impairment to be applied to the serial data pattern. A waveform record file is generated using the serial data pattern parameters, the impairment parameters for the deterministic jitter and random jitter, and the displacement crest factor emulation impairment. The displacement crest factor emulation impairment is selectively positioned in the impaired serial data pattern. A waveform generation circuit receives the waveform record file and generates an impaired serial data pattern analog output signal based on the serial data pattern, deterministic and random jitter impairments, and the displacement crest factor emulation impairment with the displacement crest factor emulation impairment being selectively positioned in the impaired serial data pattern analog output signal.
摘要翻译：信号发生装置具有显示器和中央处理单元，用于设置用于串行数据模式的参数和用于确定性和随机抖动损伤的参数，以及应用于串行数据模式的位移波峰因数仿真损害。使用串行数据模式参数生成波形记录文件，确定性抖动和随机抖动的损伤参数以及位移波峰因数仿真损伤。位移波峰因数仿真损伤有选择地位于受损的串行数据模式中。波形发生电路接收波形记录文件，并基于串行数据模式，确定性和随机抖动损伤产生受损的串行数据模式模拟输出信号，并且位移波峰因数仿真损伤被选择性地定位在受损的串行数据模式模拟输出信号。

7. 发明申请

US20080080605A1 Transport delay and jitter measurements 有权
标题翻译：传输延迟和抖动测量
公开(公告)号：US20080080605A1
公开(公告)日：2008-04-03
申请号：US11529856
申请日：2006-09-28
申请人： Kan Tan , John C. Calvin , Kalev Sepp
发明人： Kan Tan , John C. Calvin , Kalev Sepp
IPC分类号： H04B3/46
CPC分类号： H04L1/205 , G01R29/26 , G01R31/31709
摘要： A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset between the two waveforms is computed. The jitter from the two test points is filtered and a mean-removed cross-correlation coefficient is computed from the filtered jitters. A fractional delay is computed using interpolation based on LMS error, and the respective computational components are summed to compute a transport delay between the two test points. The transport delay may be used to adjust clock edges from one waveform for comparison with data transition edges of the other waveform to measure jitter.
摘要翻译：使用互相关的实时示波器测量传输延迟和抖动的方法从被测系统的两个测试点获取波形。在两个波形上运行时钟恢复以获得相应的速率和偏移量。计算两个波形之间的时间偏移。对两个测试点的抖动进行滤波，并从滤波的抖动中计算平均去除的互相关系数。使用基于LMS误差的插值计算分数延迟，并将相应的计算组件相加以计算两个测试点之间的传输延迟。传输延迟可用于从一个波形调整时钟边沿，以便与其他波形的数据转换边沿进行比较，以测量抖动。

8. 发明授权

US08866468B2 DF/dT trigger system and method 有权
标题翻译： DF / dT触发系统和方法
公开(公告)号：US08866468B2
公开(公告)日：2014-10-21
申请号：US13015128
申请日：2011-01-27
申请人： Patrick A. Smith , Daniel G. Knierim , John C. Calvin , Shane A. Hazzard
发明人： Patrick A. Smith , Daniel G. Knierim , John C. Calvin , Shane A. Hazzard
IPC分类号： G01R23/14 , G01R13/02 , H03L7/093 , G01R23/02 , G01R31/317
CPC分类号： G01R13/0254 , G01R23/02 , G01R31/31727 , H03L7/093
摘要： A dF/dT trigger system and method includes instantaneously triggering on a frequency deviation of a data signal, which can be associated with an SSC signal. After receiving a signal at an input terminal of a test and measurement instrument, the signal is low-pass filtered and transmitted to trigger circuitry. When a frequency deviation rate in the filtered signal exceeds or crosses one or more thresholds, a trigger event is produced. Also disclosed is a test and measurement instrument including an input terminal to receive the signal, input circuitry to receive and process the signal, and dF/dT trigger circuitry configured to receive the signal and produce a trigger event when a frequency deviation in the signal exceeds or crosses one or more thresholds.
摘要翻译： dF / dT触发系统和方法包括立即触发可与SSC信号相关联的数据信号的频率偏差。在测试和测量仪器的输入端接收到信号后，信号被低通滤波并传输到触发电路。当滤波信号中的频率偏差率超过或超过一个或多个阈值时，产生触发事件。还公开了一种测试和测量仪器，包括用于接收信号的输入端子，用于接收和处理信号的输入电路，以及配置为当信号中的频率偏差超过信号时接收信号并产生触发事件的dF / dT触发电路或跨越一个或多个阈值。

9. 发明授权

US08224613B2 Synthesis and generation of arbitrary waveforms with ISI components for jitter tolerance 有权
标题翻译：使用ISI组件合成并产生任意波形以实现抖动容限
公开(公告)号：US08224613B2
公开(公告)日：2012-07-17
申请号：US12048137
申请日：2008-03-13
申请人： John C. Calvin , Gary K. Richmond
发明人： John C. Calvin , Gary K. Richmond
IPC分类号： G06F19/00 , G01R13/00
CPC分类号： G01R31/31709
摘要： An Arbitrary Waveform Generator has a controller programmed to generate a sequence of test waveforms using previously-defined waveform data files. The controller generates this series of test waveforms by direct synthesis to cause each waveform to contain a respective different predetermined amount of Rj, Sj and ISI jitter components. In this way, the Arbitrary Waveform Generator produces a sequence of waveforms incorporating varying amounts of ISI to sweep the ISI jitter components from an initial amount of ISI, for example, zero ISI, and continually increment the amount of ISI to a full unit interval of ISI in predetermined increments, for example, 0.1 UI steps.
摘要翻译：任意波形发生器的控制器被编程为使用先前定义的波形数据文件生成一系列测试波形。控制器通过直接合成产生这一系列的测试波形，使每个波形包含相应不同的预定量的Rj，Sj和ISI抖动分量。以这种方式，任意波形发生器产生一系列波形，其中包含不同数量的ISI，以从ISI的初始量（例如，零ISI）扫描ISI抖动分量，并将ISI的量不断地增加到全部单位间隔 ISI以预定的增量，例如0.1 UI步长。

10. 发明授权

US07801206B2 Encoded serial data bit error detector 有权
标题翻译：编码串行数据位错误检测器
公开(公告)号：US07801206B2
公开(公告)日：2010-09-21
申请号：US11415800
申请日：2006-05-01
申请人： John C. Calvin , Michael J. Wadzita
发明人： John C. Calvin , Michael J. Wadzita
IPC分类号： H04B3/46 , H04B17/00 , H04Q1/20
CPC分类号： H04L1/243 , G01R1/025 , G01R13/0254 , G01R31/3171 , H04B17/23 , H04L1/245
摘要： An encoded serial data bit error analyzer captures the actual waveform of an encoded serial data stream associated with a bit error so that a user may readily validate the cause of the bit error. An encoded serial data stream decoder in the analyzer is modified to provide a signal for a trigger system when a characteristic of a bit error failure is detected. A power splitter produces a pair of incident encoded serial data streams from a programmable test signal, one of which is input to a device under test and the other is input to the analyzer. A re-transmitted encoded serial data stream from the device under test is input to another channel of the analyzer. The encoded serial data stream decoder provides an “error detected” output when a condition occurs in the re-transmitted encoded serial data stream indicative of a bit error. The “error detected” output is used as a trigger signal to capture the incident and re-transmitted encoded serial data waveforms surrounding the detected bit error.
摘要翻译：编码的串行数据位错误分析器捕获与位错误相关联的编码串行数据流的实际波形，使得用户可以容易地验证位错误的原因。当检测到位错误故障的特性时，分析器中的经编码的串行数据流解码器被修改为提供用于触发系统的信号。功率分配器从可编程测试信号产生一对事件编码的串行数据流，其中一个输入到被测器件，另一个输入到分析器。将来自被测器件的重新发送的编码串行数据流输入到分析仪的另一个通道。编码的串行数据流解码器在重新发送的指示位错误的编码串行数据流中出现条件时提供“检测到错误”。 “检测到错误”输出用作触发信号，用于捕获围绕检测到的位错误的事件和重新发送的编码串行数据波形。

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