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    • 1. 发明申请
    • THREE-DIMENSIONAL MULTI-BIT NON-VOLATILE MEMORY AND METHOD FOR MANUFACTURING THE SAME
    • 三维多位非易失性存储器及其制造方法
    • US20120275220A1
    • 2012-11-01
    • US13376925
    • 2011-06-30
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • H01L29/792G11C16/14G11C16/04H01L21/336
    • H01L27/11582
    • The present disclosure relates to the field of microelectronics manufacture and memories. A three-dimensional multi-bit non-volatile memory and a method for manufacturing the same are disclosed. The memory comprises a plurality of memory cells constituting a memory array. The memory array may comprise: a gate stack structure; periodically and alternately arranged gate stack regions and channel region spaces; gate dielectric layers for discrete charge storage; periodically arranged channel regions; source doping regions and drain doping regions symmetrically arranged to each other; bit lines led from the source doping regions and the drain doping regions; and word lines led from the gate stack regions. The gate dielectric layers for discrete charge storage can provide physical storage spots to achieve single-bit or multi-bit operations, so as to achieve a high storage density. According to the present disclosure, the localized charge storage characteristic of the charge trapping layer and characteristics such as a longer effective channel length and a higher density of a vertical memory structure are utilized, to provide multiple storage spots in a single memory cell. Therefore, the storage density is improved while good performances such as high speed are ensured.
    • 本公开涉及微电子制造领域和存储器。 公开了一种三维多位非易失性存储器及其制造方法。 存储器包括构成存储器阵列的多个存储单元。 存储器阵列可以包括:栅极堆叠结构; 定期和交替布置的栅极堆叠区域和沟道区域空间; 用于离散电荷存储的栅极电介质层; 定期布置的通道区域; 源极掺杂区域和漏极掺杂区域彼此对称布置; 源极掺杂区域和漏极掺杂区域引出的位线; 和从栅极堆栈区域引出的字线。 用于离散电荷存储的栅极电介质层可以提供物理存储点以实现单位或多位操作,从而实现高存储密度。 根据本公开,利用电荷俘获层的局部电荷存储特性以及垂直存储器结构的较长有效沟道长度和较高密度等特征,以在单个存储单元中提供多个存储点。 因此,存储密度得到改善,同时保证了诸如高速的良好性能。
    • 2. 发明授权
    • Three-dimensional multi-bit non-volatile memory and method for manufacturing the same
    • 三维多位非易失性存储器及其制造方法
    • US08705274B2
    • 2014-04-22
    • US13376925
    • 2011-06-30
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • G11C16/04H01L21/336
    • H01L27/11582
    • The present disclosure relates to the field of microelectronics manufacture and memories. A three-dimensional multi-bit non-volatile memory and a method for manufacturing the same are disclosed. The memory comprises a plurality of memory cells constituting a memory array. The memory array may comprise: a gate stack structure; periodically and alternately arranged gate stack regions and channel region spaces; gate dielectric layers for discrete charge storage; periodically arranged channel regions; source doping regions and drain doping regions symmetrically arranged to each other; bit lines led from the source doping regions and the drain doping regions; and word lines led from the gate stack regions. The gate dielectric layers for discrete charge storage can provide physical storage spots to achieve single-bit or multi-bit operations, so as to achieve a high storage density. According to the present disclosure, the localized charge storage characteristic of the charge trapping layer and characteristics such as a longer effective channel length and a higher density of a vertical memory structure are utilized, to provide multiple storage spots in a single memory cell. Therefore, the storage density is improved while good performances such as high speed are ensured.
    • 本公开涉及微电子制造领域和存储器。 公开了一种三维多位非易失性存储器及其制造方法。 存储器包括构成存储器阵列的多个存储单元。 存储器阵列可以包括:栅极堆叠结构; 定期和交替布置的栅极堆叠区域和沟道区域空间; 用于离散电荷存储的栅极电介质层; 定期布置的通道区域; 源极掺杂区域和漏极掺杂区域彼此对称布置; 源极掺杂区域和漏极掺杂区域引出的位线; 和从栅极堆栈区域引出的字线。 用于离散电荷存储的栅极电介质层可以提供物理存储点以实现单位或多位操作,从而实现高存储密度。 根据本公开,利用电荷俘获层的局部电荷存储特性以及垂直存储器结构的较长有效沟道长度和较高密度等特征,以在单个存储单元中提供多个存储点。 因此,存储密度得到改善,同时保证了诸如高速的良好性能。
    • 9. 发明授权
    • Double-sided needle groove, frame body and puncture frame
    • US11109889B2
    • 2021-09-07
    • US16091461
    • 2016-04-05
    • Qin Wang
    • Qin Wang
    • A61B17/34A61B90/11
    • A double-sided needle groove, a frame body and a puncture frame, wherein the double-sided needle groove has an axisymmetric outer contour, and is provided at one side with at least one needle slot a (1) and at the other side with at least one needle slot b (2); and the needle slot b (2) is fan-shaped. The double-sided needle groove is provided with one or more needle slots a (1) having a fixed needle insertion angle and a needle slot b (2) having an adjustable needle insertion angle, and the needle slot a (1) and the needle slot b (2) respectively correspond to the diameters of puncture needles and may be designed to meet multiple width specifications. During the performance of a B-ultrasound puncture operation, based on operation requirements of a surgeon for a fixed or adjustable angle, there is only a need to switch front and back sides of the double-sided needle groove, thus avoiding the need for an additional puncture frame, and switch the needle slots according to the diameters of the puncture needles. As can be seen, the double-sided needle groove can be applied to various types of B-ultrasound puncture operations and can effectively reduce the number of accessories in the puncture operations, thereby providing fast installation, saving resources and reducing costs.