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1. 发明申请

US20100179976A1 SEMICONDUCTOR DEVICE PERFORMING OPERATIONAL PROCESSING 审中-公开
标题翻译：执行操作处理的半导体器件
公开(公告)号：US20100179976A1
公开(公告)日：2010-07-15
申请号：US12687756
申请日：2010-01-14
申请人： Masakatsu ISHIZAKI , Takeshi Kumaki , Masaharu Tagami , Yuta Imai , Tetsushi Koide , Hans Jürgen Mattausch , Takayuki Gyoten , Hideyuki Noda , Yoshihiro Okuno , Kazutami Arimoto
发明人： Masakatsu ISHIZAKI , Takeshi Kumaki , Masaharu Tagami , Yuta Imai , Tetsushi Koide , Hans Jürgen Mattausch , Takayuki Gyoten , Hideyuki Noda , Yoshihiro Okuno , Kazutami Arimoto
IPC分类号： G06F7/44 , G06F5/01 , G06F7/552
CPC分类号： G06F7/5235 , G06F7/5324 , G06F7/5338
摘要： A semiconductor device includes a decoder receiving first multiplier data of 3 bits indicating a multiplier to output a shift flag, an inversion flag, and an operation flag in accordance with Booth's algorithm, and a first partial product calculation unit receiving first multiplicand data of 2 bits indicating a multiplicand, a shift flag, an inversion flag, and an operation flag to select one of the higher order bit and lower order bit of the first multiplicand data based on the shift flag, invert or non-invert the selected bit based on the inversion flag, select one of the inverted or non-inverted data and data of a predetermined logic level based on the operation flag, and output the selected data as partial product data indicating the partial product of the first multiplier data and the first multiplicand data.
摘要翻译：半导体器件包括：解码器，接收根据布斯（Booth）算法的3比特的第一乘法器数据，指示乘法器输出移位标志，反转标志和操作标志，第一部分乘积计算单元接收2位的第一被乘数数据指示被乘数，移位标志，反转标志和操作标志，以基于移位标志来选择第一被乘数数据的高位位和低位位之一，基于该选择位反转或非反转所选位反转标志，基于操作标志选择反相或非反相数据和预定逻辑电平的数据之一，并将选择的数据作为指示第一乘法器数据和第一被乘数数据的部分乘积的部分乘积数据输出。

2. 发明申请

US20070180006A1 Parallel operational processing device 失效
标题翻译：并行运行处理装置
公开(公告)号：US20070180006A1
公开(公告)日：2007-08-02
申请号：US11698188
申请日：2007-01-26
申请人： Takayuki Gyoten , Katsumi Dosaka , Hideyuki Noda , Tetsushi Tanizaki
发明人： Takayuki Gyoten , Katsumi Dosaka , Hideyuki Noda , Tetsushi Tanizaki
IPC分类号： G06F15/00
CPC分类号： G06F13/1652 , G11C7/1006 , Y02D10/14
摘要： In a parallel operational processing device having an operational processing unit arranged between memory blocks each having a plurality of memory cells arranged in rows and columns, the respective columns of each memory block are alternately connected to the operational processing units on the opposite sides of the memory block. By selecting one word line in one memory block, data can be transferred to two operational processing units. The number of the word lines selected per one operational processing unit is reduced, and power consumption is reduced. The bit operation units and sense amplifiers/write drivers of the operational processing units have arrangement pitch conditions mitigated and are reduced in number, and an isolation region between the memory blocks is not required and the layout area is reduced. Thus, the parallel operational processing device with a layout area and the power consumption reduced, can achieve a fast operation.
摘要翻译：在并行运算处理装置中，具有布置在各自具有排列成行和列的多个存储单元的存储块之间的运算处理单元，各存储块的各列交替地与存储器的相对侧的运算处理单元连接块。通过在一个存储器块中选择一个字线，可以将数据传输到两个操作处理单元。每个操作处理单元选择的字线数减少，功耗降低。操作处理单元的位操作单元和读出放大器/写驱动器具有减轻的布置节距条件，并且数量减少，并且不需要存储器块之间的隔离区域，并且布局面积减小。因此，具有布局面积和功耗降低的并行运算处理装置可以实现快速运行。

3. 发明授权

US07505352B2 Parallel operational processing device 失效
标题翻译：并行运行处理装置
公开(公告)号：US07505352B2
公开(公告)日：2009-03-17
申请号：US11698188
申请日：2007-01-26
申请人： Takayuki Gyoten , Katsumi Dosaka , Hideyuki Noda , Tetsushi Tanizaki
发明人： Takayuki Gyoten , Katsumi Dosaka , Hideyuki Noda , Tetsushi Tanizaki
IPC分类号： G11C8/00 , G11C5/06 , G11C7/00
CPC分类号： G06F13/1652 , G11C7/1006 , Y02D10/14
摘要： In a parallel operational processing device having an operational processing unit arranged between memory blocks each having a plurality of memory cells arranged in rows and columns, the respective columns of each memory block are alternately connected to the operational processing units on the opposite sides of the memory block. By selecting one word line in one memory block, data can be transferred to two operational processing units. The number of the word lines selected per one operational processing unit is reduced, and power consumption is reduced. The bit operation units and sense amplifiers/write drivers of the operational processing units have arrangement pitch conditions mitigated and are reduced in number, and an isolation region between the memory blocks is not required and the layout area is reduced. Thus, the parallel operational processing device with a layout area and the power consumption reduced, can achieve a fast operation.
摘要翻译：在并行运算处理装置中，具有布置在各自具有排列成行和列的多个存储单元的存储块之间的运算处理单元，各存储块的各列交替地与存储器的相对侧的运算处理单元连接块。通过在一个存储器块中选择一个字线，可以将数据传输到两个操作处理单元。每个操作处理单元选择的字线数减少，功耗降低。操作处理单元的位操作单元和读出放大器/写驱动器具有减轻的布置节距条件，并且数量减少，并且不需要存储器块之间的隔离区域，并且布局面积减小。因此，具有布局面积和功耗降低的并行运算处理装置可以实现快速运行。

4. 发明申请

US20060285576A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060285576A1
公开(公告)日：2006-12-21
申请号：US11452317
申请日：2006-06-14
申请人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
发明人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
IPC分类号： G01K7/00 , H05B1/02
CPC分类号： G01K7/01
摘要： There is provided a technique which is capable of detecting a temperature of a semiconductor device with high precision. A temperature detection circuit detecting a temperature of a semiconductor device includes a first short-cycle oscillator generating a first clock signal having positive temperature characteristics with respect to a frequency, a second short-cycle oscillator generating a second clock signal having negative temperature characteristics with respect to the frequency, and a temperature signal generation unit generating a temperature signal which is varied according to the temperature of the semiconductor device based on the first and second clock signals.
摘要翻译：提供了能够高精度地检测半导体器件的温度的技术。检测半导体器件的温度的温度检测电路包括：第一短周期振荡器，其产生相对于频率具有正温度特性的第一时钟信号;第二短周期振荡器，产生具有负温度特性的第二时钟信号以及温度信号生成单元，其基于第一和第二时钟信号产生根据半导体器件的温度而变化的温度信号。

5. 发明授权

US06693815B2 Semiconductor associative memory 失效
标题翻译：半导体联想记忆
公开(公告)号：US06693815B2
公开(公告)日：2004-02-17
申请号：US10050119
申请日：2002-01-18
申请人： Hans Jurgen Mattausch , Takayuki Gyoten
发明人： Hans Jurgen Mattausch , Takayuki Gyoten
IPC分类号： G11C1500
CPC分类号： G11C15/00 , G11C15/04
摘要： An associative memory composed of plural chips or a single chip which is preferably used in the fields of bandwidth compression for video images in mobile communication terminals and artificial intelligence systems. The associative memory is a small-area associative memory formed using CMOS technology with a fast parallel minimum-distance-search capability. The transistor number of the provided search circuit is only linear proportional to the number of rows of the associative memory. Therefore, the increase in the number of required circuits is small even if the unit number of the input data or the unit number of the reference data is large. With the associative memory, it is possible to realize the functions of video signal compression and object recognition necessary for artificial intelligence systems, data bank systems and mobile network terminals with a single chip or plural chips.
摘要翻译：由移动通信终端和人造智能系统中的视频图像的带宽压缩领域中优选使用的多个芯片或单个芯片构成的关联存储器。关联存储器是使用具有快速并行最小距离搜索能力的CMOS技术形成的小面积关联存储器。所提供的搜索电路的晶体管数量仅与关联存储器的行数成线性比例。因此，即使输入数据的单位数或参考数据的单位数量大，所需电路数量的增加也很小。利用关联存储器，可以实现具有单个芯片或多个芯片的人造智能系统，数据库系统和移动网络终端所需的视频信号压缩和对象识别的功能。

6. 发明申请

US20090058543A1 Temperature detecting semiconductor device 审中-公开
标题翻译：温度检测半导体器件
公开(公告)号：US20090058543A1
公开(公告)日：2009-03-05
申请号：US12289230
申请日：2008-10-23
申请人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
发明人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
IPC分类号： G01K7/00
CPC分类号： G01K7/01
摘要： There is provided a technique which is capable of detecting a temperature of a semiconductor device with high precision. A temperature detection circuit detecting a temperature of a semiconductor device includes a first short-cycle oscillator generating a first clock signal having positive temperature characteristics with respect to a frequency, a second short-cycle oscillator generating a second clock signal having negative temperature characteristics with respect to the frequency, and a temperature signal generation unit generating a temperature signal which is varied according to the temperature of the semiconductor device based on the first and second clock signals.
摘要翻译：提供了能够高精度地检测半导体器件的温度的技术。检测半导体器件的温度的温度检测电路包括：第一短周期振荡器，其产生相对于频率具有正温度特性的第一时钟信号;第二短周期振荡器，产生具有负温度特性的第二时钟信号以及温度信号生成单元，其基于第一和第二时钟信号产生根据半导体器件的温度而变化的温度信号。

7. 发明授权

US07459983B2 Temperature detecting semiconductor device 有权
标题翻译：温度检测半导体器件
公开(公告)号：US07459983B2
公开(公告)日：2008-12-02
申请号：US11452317
申请日：2006-06-14
申请人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
发明人： Takayuki Gyoten , Fukashi Morishita , Katsumi Dosaka
IPC分类号： G01K7/00
CPC分类号： G01K7/01
摘要： There is provided a technique which is capable of detecting a temperature of a semiconductor device with high precision. A temperature detection circuit detecting a temperature of a semiconductor device includes a first short-cycle oscillator generating a first clock signal having positive temperature characteristics with respect to a frequency, a second short-cycle oscillator generating a second clock signal having negative temperature characteristics with respect to the frequency, and a temperature signal generation unit generating a temperature signal which is varied according to the temperature of the semiconductor device based on the first and second clock signals.
摘要翻译：提供了能够高精度地检测半导体器件的温度的技术。检测半导体器件的温度的温度检测电路包括：第一短周期振荡器，其产生相对于频率具有正温度特性的第一时钟信号;第二短周期振荡器，产生具有负温度特性的第二时钟信号以及温度信号生成单元，其基于第一和第二时钟信号产生根据半导体器件的温度而变化的温度信号。

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