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1. 发明申请

US20110215873A1 NOVEL SWITCHED PHASE AND FREQUENCY DETECTOR BASED DPLL CIRCUIT WITH EXCELLENT WANDER AND JITTER PERFORMANCE AND FAST FREQUENCY ACQUISITION 有权
标题翻译：基于新型开关相位和频率检测器的DPLL电路，具有优异的宽带和抖动性能和快速采集
公开(公告)号：US20110215873A1
公开(公告)日：2011-09-08
申请号：US12715749
申请日：2010-03-02
申请人： Leo Montreuil , Larry Stephen McKinney , Jiening Ao , Joel Paul Jenkins
发明人： Leo Montreuil , Larry Stephen McKinney , Jiening Ao , Joel Paul Jenkins
IPC分类号： H03L7/00
CPC分类号： H03L7/00 , Y10S331/02
摘要： Some embodiments of the present invention may include a DPLL circuit comprising a firmware. The firmware may comprise a re-sampled NCO phase detector capable of receiving a reference clock timing signal and a VCXO clock timing signal. The re-sampled NCO phase detector may comprise a resampler capable of receiving phase output and the VCXO clock timing signal and resampling the phase output; and a subtractor capable of receiving the resampled phase output and subtracting the resampled phase output from a calculated mean value of the phase output. The firmware may further comprise a frequency detector capable of receiving the reference clock timing signal and the VCXO clock timing signal; and a multiplexer capable of switching between the re-sampled NCO phase detector and the frequency detector dependent upon a frequency lock status.
摘要翻译：本发明的一些实施例可以包括包括固件的DPLL电路。固件可以包括能够接收参考时钟定时信号和VCXO时钟定时信号的重新采样的NCO相位检测器。重新采样的NCO相位检测器可以包括能够接收相位输出和VCXO时钟定时信号并重新采样相位输出的重采样器; 以及减法器，其能够从所计算的相位输出的平均值接收所述重采样相位输出并减去所述重采样相位输出。固件还可以包括能够接收参考时钟定时信号和VCXO时钟定时信号的频率检测器; 以及能够根据频率锁定状态在重新采样的NCO相位检测器和频率检测器之间切换的多路复用器。

2. 发明授权

US08111106B2 Switched phase and frequency detector based DPLL circuit with excellent wander and jitter performance and fast frequency acquisition 有权
标题翻译：基于开关相位和频率检测器的DPLL电路，具有出色的漂移和抖动性能以及快速频率采集
公开(公告)号：US08111106B2
公开(公告)日：2012-02-07
申请号：US12715749
申请日：2010-03-02
申请人： Leo Montreuil , Larry Stephen McKinney , Jiening Ao , Joel Paul Jenkins
发明人： Leo Montreuil , Larry Stephen McKinney , Jiening Ao , Joel Paul Jenkins
IPC分类号： H03L7/087 , H03D13/00
CPC分类号： H03L7/00 , Y10S331/02
摘要： Some embodiments of the present invention may include a DPLL circuit comprising a firmware. The firmware may comprise a re-sampled NCO phase detector capable of receiving a reference clock timing signal and a VCXO clock timing signal. The re-sampled NCO phase detector may comprise a resampler capable of receiving phase output and the VCXO clock timing signal and resampling the phase output; and a subtractor capable of receiving the resampled phase output and subtracting the resampled phase output from a calculated mean value of the phase output. The firmware may further comprise a frequency detector capable of receiving the reference clock timing signal and the VCXO clock timing signal; and a multiplexer capable of switching between the re-sampled NCO phase detector and the frequency detector dependent upon a frequency lock status.
摘要翻译：本发明的一些实施例可以包括包括固件的DPLL电路。固件可以包括能够接收参考时钟定时信号和VCXO时钟定时信号的重新采样的NCO相位检测器。重新采样的NCO相位检测器可以包括能够接收相位输出和VCXO时钟定时信号并重新采样相位输出的重采样器; 以及减法器，其能够从所计算的相位输出的平均值接收所述重采样相位输出并减去所述重采样相位输出。固件还可以包括能够接收参考时钟定时信号和VCXO时钟定时信号的频率检测器; 以及能够根据频率锁定状态在重新采样的NCO相位检测器和频率检测器之间切换的多路复用器。

3. 发明申请

US20080092183A1 MULTI-CARRIER FREQUENCY-DIVISION MULTIPLEXING (FDM) ARCHITECTURE FOR HIGH SPEED DIGITAL SERVICE 有权
公开(公告)号：US20080092183A1
公开(公告)日：2008-04-17
申请号：US11953925
申请日：2007-12-11
申请人： Donald Sorenson , Jiening Ao , Steven Blashewski , John Brickell , Florin Farcas , Richard Futch , Joseph Mobley , John Ritchie , Lamar West
发明人： Donald Sorenson , Jiening Ao , Steven Blashewski , John Brickell , Florin Farcas , Richard Futch , Joseph Mobley , John Ritchie , Lamar West
IPC分类号： H04N7/173
CPC分类号： H04N21/4382 , H04J4/00 , H04L7/041 , H04L12/2801 , H04L12/403 , H04L27/2657 , H04L29/06027 , H04L65/1016 , H04N7/10 , H04N7/17309 , H04N21/2362 , H04N21/2365 , H04N21/2383 , H04N21/4305 , H04N21/437 , H04N21/6118 , H04N21/6168
摘要： An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator. Furthermore, the architecture may be integrated into other higher level devices such as, but not limited to, bridges, switches, routers, and/or gateways. The architecture generally may peacefully coexist with other services commonly-found in cable distribution networks.

4. 发明授权

US06751271B2 Detecting a carrier signal by using a power averaging circuit 有权
标题翻译：通过使用功率平均电路来检测载波信号
公开(公告)号：US06751271B2
公开(公告)日：2004-06-15
申请号：US10213683
申请日：2002-08-06
申请人： Thai-Bao H. Kien , Jiening Ao , Lamar E. West, Jr.
发明人： Thai-Bao H. Kien , Jiening Ao , Lamar E. West, Jr.
IPC分类号： H04L2722
CPC分类号： H04L27/0014 , H04L5/143
摘要： The present invention provides an apparatus and method for detecting the presence of a carrier signal that is included in the reverse signals of a communications system. The present invention uses an improved apparatus that determines the average power of the reverse signals during a predetermined counting cycle. The average power is then compared to a threshold power value. If the average power exceeds the threshold power value, an enable signal is provided to allow further transmission of the reverse signals.
摘要翻译：本发明提供一种用于检测包括在通信系统的反向信号中的载波信号的存在的装置和方法。本发明使用改进的装置，其在预定计数周期内确定反向信号的平均功率。然后将平均功率与阈值功率值进行比较。如果平均功率超过阈值功率值，则提供使能信号以允许进一步发送反向信号。

5. 发明授权

US07928813B1 Transient noise control for digital RF modulation 有权
标题翻译：用于数字RF调制的瞬态噪声控制
公开(公告)号：US07928813B1
公开(公告)日：2011-04-19
申请号：US12551566
申请日：2009-09-01
申请人： Jiening Ao , Koen Van Renterghem , Jan Codenie
发明人： Jiening Ao , Koen Van Renterghem , Jan Codenie
IPC分类号： H03C3/00 , H04L25/00 , H04L25/02 , H04L25/03 , H04L27/12 , H04L27/20
CPC分类号： H04L27/3405
摘要： In one embodiment, a switch provides output to a digital radio frequency (RF) modulator having a filtered input stage. The switch is configured to selectively provide a zero power data signal to the RF modulator based on a transient event control signal received at the switch.
摘要翻译：在一个实施例中，开关向具有滤波输入级的数字射频（RF）调制器提供输出。开关被配置为基于在开关处接收到的瞬态事件控制信号来选择性地向RF调制器提供零功率数据信号。

6. 发明申请

US20090029661A1 Amplifier with a Quadrature Amplitude Modulation (QAM) Modulated and a Continuous Wave Automatic Gain Control (AGC) Circuit 有权
标题翻译：具有正交幅度调制（QAM）调制和连续波自动增益控制（AGC）电路的放大器
公开(公告)号：US20090029661A1
公开(公告)日：2009-01-29
申请号：US11828456
申请日：2007-07-26
申请人： Jiening Ao
发明人： Jiening Ao
IPC分类号： H04B1/04 , H03G3/22
CPC分类号： H03G3/3078 , H04L27/366
摘要： The present invention is directed to systems and methods for providing an AGC circuit for maintaining a constant output power level from an amplifier. More specifically, the AGC circuit includes a circuitry for determining whether an input signal is a QAM or a CW signal. A QAM/CW gain switch is then controlled depending upon the input signal. Depending upon the mode of the QAM/CW gain switch, the AGC circuit either attenuates the power level of the signal or bypasses the signal. The bypassed or attenuated signal is then compared to a reference signal so that the AGC circuit produces an adjusting voltage accordingly. The amplifier finally receives the adjusting voltage and attenuates the output power level of the signal.
摘要翻译：本发明涉及用于提供用于维持来自放大器的恒定输出功率电平的AGC电路的系统和方法。更具体地，AGC电路包括用于确定输入信号是QAM还是CW信号的电路。然后根据输入信号控制QAM / CW增益开关。根据QAM / CW增益开关的模式，AGC电路可以衰减信号的功率电平或绕过信号。然后将旁路或衰减的信号与参考信号进行比较，使得AGC电路相应地产生调整电压。放大器最后接收调节电压并衰减信号的输出功率电平。

7. 发明申请

US20080095083A1 MULTI-CARRIER FREQUENCY-DIVISION MULTIPLEXING (FDM) ARCHITECTURE FOR HIGH SPEED DIGITAL SERVICE 有权
标题翻译：用于高速数字服务的多载波频分多址（FDM）架构
公开(公告)号：US20080095083A1
公开(公告)日：2008-04-24
申请号：US11953941
申请日：2007-12-11
申请人： Donald Sorenson , Jiening Ao , Steven Blashewski , John Brickell , Florin Farcas , Richard Futch , Joseph Mobley , John Ritchie , Lamar West
发明人： Donald Sorenson , Jiening Ao , Steven Blashewski , John Brickell , Florin Farcas , Richard Futch , Joseph Mobley , John Ritchie , Lamar West
IPC分类号： H04L5/14
CPC分类号： H04N21/4382 , H04J4/00 , H04L7/041 , H04L12/2801 , H04L12/403 , H04L27/2657 , H04L29/06027 , H04L65/1016 , H04N7/10 , H04N7/17309 , H04N21/2362 , H04N21/2365 , H04N21/2383 , H04N21/4305 , H04N21/437 , H04N21/6118 , H04N21/6168
摘要： An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator. Furthermore, the architecture may be integrated into other higher level devices such as, but not limited to, bridges, switches, routers, and/or gateways. The architecture generally may peacefully coexist with other services commonly-found in cable distribution networks.
摘要翻译：用于通过频分复用（FDM）信道提供高速接入的架构允许通过有线传输网络或其它形式的FDM传输传输以太网帧和/或其他数据。该架构涉及下游和上游FDM复用技术，以允许跨多个频率信道同时进行并行通信。此外，该架构允许中央集中器支持多个远程设备，每个远程设备通过双向数据流的面向连接的分配来保证带宽。上行和下行带宽分配可以支持任意方向的对称带宽以及非对称带宽。该架构通常可用于支持远程设备和中央集中器之间的面向连接的物理层连接。此外，该架构可以集成到其他较高级别的设备中，例如但不限于网桥，交换机，路由器和/或网关。该架构通常可以和有线分布网络中常见的其他服务和平共存。

8. 发明授权

US08363679B2 Clock synchronization in a bidirectional network 有权
标题翻译：双向网络中的时钟同步
公开(公告)号：US08363679B2
公开(公告)日：2013-01-29
申请号：US12422593
申请日：2009-04-13
申请人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
发明人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
IPC分类号： H04J3/06
CPC分类号： H04N21/4382 , H04J4/00 , H04L7/041 , H04L12/2801 , H04L29/06027 , H04L65/1016 , H04N7/10 , H04N7/17309 , H04N21/2362 , H04N21/2365 , H04N21/2383 , H04N21/4305 , H04N21/437 , H04N21/6118 , H04N21/6168
摘要： An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of Ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each has guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. As a local network, the architecture supports guaranteed bandwidth for delivery of data flows to a plurality of host devices.
摘要翻译：用于通过频分复用（FDM）信道提供高速接入的架构允许通过有线传输网络或其他形式的FDM传输传输以太网帧和/或其他数据。该架构涉及下游和上游FDM复用技术，以允许跨多个频率信道同时进行并行通信。此外，该架构允许中央集线器支持多个远程设备，每个远程设备通过双向数据流的面向连接的分配来保证带宽。上行和下行带宽分配可以支持任意方向的对称带宽以及非对称带宽。作为本地网络，该架构支持用于向多个主机设备传送数据流的保证带宽。

9. 发明授权

US07933288B2 Multi-carrier frequency-division multiplexing (FDM) architecture for high speed digital service 有权
标题翻译：用于高速数字业务的多载波频分复用（FDM）架构
公开(公告)号：US07933288B2
公开(公告)日：2011-04-26
申请号：US11953925
申请日：2007-12-11
申请人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
发明人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
IPC分类号： H04B7/212
CPC分类号： H04N21/4382 , H04J4/00 , H04L7/041 , H04L12/2801 , H04L12/403 , H04L27/2657 , H04L29/06027 , H04L65/1016 , H04N7/10 , H04N7/17309 , H04N21/2362 , H04N21/2365 , H04N21/2383 , H04N21/4305 , H04N21/437 , H04N21/6118 , H04N21/6168
摘要： An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator. Furthermore, the architecture may be integrated into other higher level devices such as, but not limited to, bridges, switches, routers, and/or gateways. The architecture generally may peacefully coexist with other services commonly-found in cable distribution networks.
摘要翻译：用于通过频分复用（FDM）信道提供高速接入的架构允许通过有线传输网络或其它形式的FDM传输传输以太网帧和/或其他数据。该架构涉及下游和上游FDM复用技术，以允许跨多个频率信道同时进行并行通信。此外，该架构允许中央集中器支持多个远程设备，每个远程设备通过双向数据流的面向连接的分配来保证带宽。上行和下行带宽分配可以支持任意方向的对称带宽以及非对称带宽。该架构通常可用于支持远程设备和中央集中器之间的面向连接的物理层连接。此外，该架构可以集成到其他较高级别的设备中，例如但不限于网桥，交换机，路由器和/或网关。该架构通常可以和有线分布网络中常见的其他服务和平共存。

10. 发明授权

US07336680B2 Multi-carrier frequency-division multiplexing (FDM) architecture for high speed digital service 有权
标题翻译：用于高速数字业务的多载波频分复用（FDM）架构
公开(公告)号：US07336680B2
公开(公告)日：2008-02-26
申请号：US10244899
申请日：2002-09-17
申请人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
发明人： Donald C. Sorenson , Jiening Ao , Steven E. Blashewski , John W. Brickell , Florin Farcas , Richard J. Futch , Joseph Graham Mobley , John A. Ritchie, Jr. , Lamar E. West, Jr.
IPC分类号： H04J3/16
CPC分类号： H04N21/4382 , H04J4/00 , H04L7/041 , H04L12/2801 , H04L12/403 , H04L27/2657 , H04L29/06027 , H04L65/1016 , H04N7/10 , H04N7/17309 , H04N21/2362 , H04N21/2365 , H04N21/2383 , H04N21/4305 , H04N21/437 , H04N21/6118 , H04N21/6168
摘要： An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator. Furthermore, the architecture may be integrated into other higher level devices such as, but not limited to, bridges, switches, routers, and/or gateways. The architecture generally may peacefully coexist with other services commonly-found in cable distribution networks.
摘要翻译：用于通过频分复用（FDM）信道提供高速接入的架构允许通过有线传输网络或其它形式的FDM传输传输以太网帧和/或其他数据。该架构涉及下游和上游FDM复用技术，以允许跨多个频率信道同时进行并行通信。此外，该架构允许中央集中器支持多个远程设备，每个远程设备通过双向数据流的面向连接的分配来保证带宽。上行和下行带宽分配可以支持任意方向的对称带宽以及非对称带宽。该架构通常可用于支持远程设备和中央集中器之间的面向连接的物理层连接。此外，该架构可以集成到其他较高级别的设备中，例如但不限于网桥，交换机，路由器和/或网关。该架构通常可以和有线分布网络中常见的其他服务和平共存。

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