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1. 发明申请

US20050079559A1 Antibodies specific for phosphorylation sites and screening methods using the same antibodies 有权
标题翻译：对磷酸化位点特异的抗体和使用相同抗体的筛选方法
公开(公告)号：US20050079559A1
公开(公告)日：2005-04-14
申请号：US10822860
申请日：2004-04-13
申请人： Koichi Matsuzaki , Toshihito Seki , Masanori Matsushita , Yoshiya Tahashi , Fukiko Furukawa , Yasushi Sugano , Shigeo Mori , Hideo Yamagata , Katsunori Yoshida , Mikio Nishizawa , Junichi Fujisawa , Kyoichi Inoue , Keiko Inoue
发明人： Koichi Matsuzaki , Toshihito Seki , Masanori Matsushita , Yoshiya Tahashi , Fukiko Furukawa , Yasushi Sugano , Shigeo Mori , Hideo Yamagata , Katsunori Yoshida , Mikio Nishizawa , Junichi Fujisawa , Kyoichi Inoue , Keiko Inoue
IPC分类号： C07K16/18 , C12Q1/02 , G01N33/15 , G01N33/50 , G01N33/53 , G01N33/566 , G01N33/574 , A61K39/395 , C07K16/30
CPC分类号： G01N33/502 , C07K16/18 , G01N33/5008 , G01N33/5011 , G01N33/5044 , G01N33/5067 , G01N33/5088 , G01N33/57419
摘要： Polyclonal antibody specific for a phosphorylated linker region in Smad2 and/or Smad3.
摘要翻译： Smad2和/或Smad3中的磷酸化接头区域特异的多克隆抗体。

2. 发明授权

US5082781A .beta.-amylase gene 失效
标题翻译：（BETA） - 氨基酸基因
公开(公告)号：US5082781A
公开(公告)日：1992-01-21
申请号：US611480
申请日：1990-11-09
申请人： Hideo Yamagata , Noriyuki Kitamoto , Takeo Kato , Norihiro Tsukagoshi , Shigezo Udaka
发明人： Hideo Yamagata , Noriyuki Kitamoto , Takeo Kato , Norihiro Tsukagoshi , Shigezo Udaka
IPC分类号： C12N1/21 , C12N9/26 , C12N15/00 , C12N15/09 , C12N15/56 , C12R1/145
CPC分类号： C12N9/2425
摘要： A novel .beta.-amylase gene is provided. This gene is useful for production of a thermophilic .beta.-amylase obtained from Clostridium thermosulfurogenes on a large scale, especially from genetically engineered microorganisms introduced with this gene. B. subtilis was transformed with a plasmid pNK1 containing the above gene and the transformed B. subtilis cells produced .beta.-amylase having the same thermostability as that of .beta.-amylase obtained from C. thermosulfurogenes.

3. 发明授权

US4929559A DNA containing the prolipoprotein signal peptidase gene 失效
标题翻译：含有上游蛋白信号肽酶基因的DNA
公开(公告)号：US4929559A
公开(公告)日：1990-05-29
申请号：US161414
申请日：1988-02-23
申请人： Shoji Mizushima , Hideo Yamagata
发明人： Shoji Mizushima , Hideo Yamagata
IPC分类号： C12N15/09 , C12N1/00 , C12N9/52 , C12N15/62 , C12R1/19
CPC分类号： C12N9/52 , C12N15/625 , Y10S435/849
摘要： One of the E. coli strains of the Clarke and Carbon collection [Cell, 9, 91-99] has been found to contain a plasmid which we have isolated and termed pLC3-13, which contains genetic information coding for prolipoprotein signal peptidase. A 4.3 kb fragment containing this genetic information has been prepared, other plasmids have been prepared containing at least this fragment and strains of E. coli have been transformed thereby.
摘要翻译：已经发现Clarke和Carbon收集的一种大肠杆菌菌株[Cell，9,91-99]含有我们已经分离并命名为pLC3-13的质粒，其含有编码上游蛋白信号肽酶的遗传信息。已经制备了含有该遗传信息的4.3kb片段，至少含有该片段的其他质粒已被制备，并且已经转化了大肠杆菌菌株。

4. 发明授权

US07507642B2 Vapor-phase growth method, semiconductor manufacturing method and semiconductor device manufacturing method 有权
标题翻译：气相生长法，半导体制造方法和半导体器件制造方法
公开(公告)号：US07507642B2
公开(公告)日：2009-03-24
申请号：US11747575
申请日：2007-05-11
申请人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
发明人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
IPC分类号： H01L21/322 , H01L21/22 , H01L21/38
CPC分类号： H01L21/02505 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/66242
摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.
摘要翻译：在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤从而在第二半导体层上沉积硅层的第三半导体层。因此，可以获得其中可以提高失配位错的半导体层。

5. 发明授权

US07060582B2 Adjusting the germanium concentration of a semiconductor layer for equal thermal expansion for a hetero-junction bipolar transistor device 失效
标题翻译：调整用于异质结双极晶体管器件的相同热膨胀的半导体层的锗浓度
公开(公告)号：US07060582B2
公开(公告)日：2006-06-13
申请号：US10480061
申请日：2002-06-04
申请人： Takeyoshi Koumoto , Hideo Yamagata
发明人： Takeyoshi Koumoto , Hideo Yamagata
IPC分类号： H01L21/331
CPC分类号： H01L29/66242 , H01L29/7378 , Y10S438/933 , Y10S438/938
摘要： The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor.
摘要翻译：本发明涉及例如可应用于异质结双极晶体管的半导体层及其形成方法以及半导体器件及其制造方法。根据本发明的半导体层及其形成方法包括含有Ge的第一SiGe膜或SiGeC膜，其浓度变得等于氧化硅的热膨胀系数，以及形成在第一膜上的第二SiGe膜或SiGeC膜。在根据本发明的半导体器件及其制造方法中，第一层和第二层层叠在具有开口的氧化物膜上，并且第一层具有与氧化膜大致相同的热膨胀系数，并且具有热膨胀系数与第二层不同。因此，难以在层压膜中产生由热膨胀系数之差引起的应力，因此能够抑制失配位错的发生。因此，本发明适用于异质结双极晶体管。

6. 发明授权

US06284552B1 Method and apparatus for evaluating surface roughness of an epitaxial growth layer, method and apparatus for measuring reflectance of an epitaxial growth layer, and manufacturing method of semiconductor device 失效
标题翻译：用于评价外延生长层的表面粗糙度的方法和装置，用于测量外延生长层的反射率的方法和装置，以及半导体装置的制造方法
公开(公告)号：US06284552B1
公开(公告)日：2001-09-04
申请号：US09190461
申请日：1998-11-13
申请人： Hideo Yamagata , Takashi Noguchi , Satoshi Hashidume
发明人： Hideo Yamagata , Takashi Noguchi , Satoshi Hashidume
IPC分类号： H01L2166
CPC分类号： G01N21/33 , H01L22/12 , Y10S438/964
摘要： Correlation formulae having predetermined forms (i.e., straight lines representing relationships between the surface roughness of the reflectance) are determined in advance between measurement values of the ultraviolet reflectance of the surfaces of respective sample epitaxial growth layers obtained by using an ultraviolet spectrophotometer at a wavelength of 200 nm and measured values of the surface roughness of the same samples by using an atomic force microscope. The surface roughness of an ensuing measurement object is determined by measuring only its ultraviolet reflectance and substituting a resulting measurement value into the correlation formulae.
摘要翻译：具有预定形式的相关公式（即，表示反射率的表面粗糙度之间的关系的直线）预先在通过使用紫外分光光度计获得的各个样品外延生长层的表面的紫外反射率的测量值之间确定波长通过使用原子力显微镜测量相同样品的表面粗糙度的测量值。通过仅测量其紫外反射率并将所得到的测量值代入相关公式来确定随后的测量对象的表面粗糙度。

7. 发明授权

US4994380A Process for expressing genes by Bacillus brevis 失效
标题翻译：用短芽孢杆菌表达基因的方法
公开(公告)号：US4994380A
公开(公告)日：1991-02-19
申请号：US928125
申请日：1986-11-07
申请人： Shigezo Udaka , Norihiro Tsukagoshi , Hideo Yamagata
发明人： Shigezo Udaka , Norihiro Tsukagoshi , Hideo Yamagata
IPC分类号： C12N15/09 , C12N1/21 , C12N9/28 , C12N15/00 , C12N15/75 , C12P21/00 , C12P21/02 , C12R1/08
CPC分类号： C12N9/2417 , C12N15/75 , Y10S435/833
摘要： An improved vector for expression in Bacillus brevis having:(1) a nucleotide sequence (a) represented by a general formula MNOACP;(2) a nucleotide sequence (b) located in the downstream of the nucleotide sequence (a) and represented by a general formula QRSWXY;(3) a nucleotide sequence (c) located in the downstream of the nucleotide sequence (b) and acting as a binding site to ribosome in the cell of Bacillus brevis;(4) a nucleotide sequence (d) located in the downstream of the nucleotide sequence (c) and acting as a translation initiation condon in the cell of Bacillus brevis; and(5) a gene directly connected with the nucleotide sequence (d) and to express in the cell of Bacillus brevis;wherein M represents G or T; N represents C, T or A; O represents A, C or T; P represents T or G; Q represents T or A; R represents T or A; S represents T, C or A; W represents A or G; X represents A or C; and Y represents T or G; and furthermore, wherein A represents adenine, C cytosine, G guanine and T thymine.
摘要翻译：一种用于在短芽孢杆菌中表达的改良载体，其具有：（1）由通式MNOACP表示的核苷酸序列（a）（2）位于核苷酸序列（a）的下游并由通式QRSWXY表示的核苷酸序列（b）; （3）位于核苷酸序列（b）下游的核苷酸序列（c），并且作为芽孢杆菌细胞中核糖体的结合位点; （4）位于核苷酸序列（c）下游的核苷酸序列（d），并在短芽孢杆菌细胞中作为翻译起始细菌; 和（5）与核苷酸序列（d）直接连接并在短芽孢杆菌细胞中表达的基因; 其中M表示G或T; N表示C，T或A; O表示A，C或T; P表示T或G; Q表示T或A; R表示T或A; S表示T，C或A; W代表A或G; X表示A或C; Y表示T或G; 此外，其中A表示腺嘌呤，C胞嘧啶，G鸟嘌呤和T胸腺嘧啶。

8. 发明授权

US07303979B2 Vapor-phase growth method, semiconductor manufacturing method and semiconductor device manufacturing method 有权
标题翻译：气相生长法，半导体制造方法和半导体器件制造方法
公开(公告)号：US07303979B2
公开(公告)日：2007-12-04
申请号：US10818821
申请日：2004-04-06
申请人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
发明人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
IPC分类号： H01L21/322
CPC分类号： H01L21/02505 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/66242
摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.
摘要翻译：在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤从而在第二半导体层上沉积硅层的第三半导体层。因此，可以获得其中可以提高失配位错的半导体层。

9. 发明授权

US07157344B2 Vapor-phase growth method, semiconductor manufacturing method and semiconductor device manufacturing method 有权
公开(公告)号：US07157344B2
公开(公告)日：2007-01-02
申请号：US10204386
申请日：2001-12-20
申请人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
发明人： Hideo Yamagata , Takeyoshi Koumoto , Kenji Atsuumi , Yoichi Negoro , Tatsushiro Hirata , Takashi Noguchi
IPC分类号： H01L21/331
CPC分类号： H01L21/02505 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/66242
摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

10. 发明申请

US20060163625A1 Semiconductor layer and forming method thereof, and semiconductor device and manufacturing method thereof technical field 审中-公开
标题翻译：半导体层及其形成方法，半导体器件及其制造方法技术领域
公开(公告)号：US20060163625A1
公开(公告)日：2006-07-27
申请号：US11341578
申请日：2006-01-26
申请人： Takeyoshi Koumoto , Hideo Yamagata
发明人： Takeyoshi Koumoto , Hideo Yamagata
IPC分类号： H01L29/76 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/7378 , Y10S438/933 , Y10S438/938
摘要： The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor.
摘要翻译：本发明涉及例如可应用于异质结双极晶体管的半导体层及其形成方法以及半导体器件及其制造方法。根据本发明的半导体层及其形成方法包括含有Ge的第一SiGe膜或SiGeC膜，其浓度变得等于氧化硅的热膨胀系数，以及形成在第一膜上的第二SiGe膜或SiGeC膜。在根据本发明的半导体器件及其制造方法中，第一层和第二层层叠在具有开口的氧化物膜上，并且第一层具有与氧化膜大致相同的热膨胀系数，并且具有热膨胀系数与第二层不同。因此，难以在层压膜中产生由热膨胀系数之差引起的应力，因此能够抑制失配位错的发生。因此，本发明适用于异质结双极晶体管。

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