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    • 1. 发明授权
    • Thin film transistor array and method of manufacturing the same
    • 薄膜晶体管阵列及其制造方法
    • US08390776B2
    • 2013-03-05
    • US13450643
    • 2012-04-19
    • Ki-Hun JeongSeung-Hwan ShimJoo-Han KimHong-Kee Chin
    • Ki-Hun JeongSeung-Hwan ShimJoo-Han KimHong-Kee Chin
    • G02F1/13
    • H01L27/1214H01L27/1288H01L29/4908
    • A method of manufacturing a thin film transistor array substrate includes: forming a gate pattern on a substrate; forming a first gate insulating film and a second gate insulating film on the substrate; forming a source/drain pattern and a semiconductor pattern on the substrate; forming a passivation film on the substrate; forming a photo-resist pattern on the passivation film; patterning the passivation film using the photo-resist pattern to form a passivation film pattern, the patterning of the passivation film including over-etching the passivation film to form an open region in the passivation film; forming a transparent electrode film on the substrate; removing the photo-resist pattern and a portion of the transparent electrode film on the photo-resist pattern; and forming a pixel electrode on the first gate insulating layer.
    • 制造薄膜晶体管阵列基板的方法包括:在基板上形成栅极图案; 在所述基板上形成第一栅极绝缘膜和第二栅极绝缘膜; 在衬底上形成源极/漏极图案和半导体图案; 在衬底上形成钝化膜; 在钝化膜上形成光刻胶图案; 使用光刻胶图形图案化钝化膜以形成钝化膜图案,钝化膜的图案化包括过蚀刻钝化膜以在钝化膜中形成开放区域; 在基板上形成透明电极膜; 在所述光刻胶图案上除去所述光刻胶图案和所述透明电极膜的一部分; 以及在所述第一栅极绝缘层上形成像素电极。
    • 2. 发明授权
    • Thin film transistor array and method of manufacturing the same
    • 薄膜晶体管阵列及其制造方法
    • US08184251B2
    • 2012-05-22
    • US12498526
    • 2009-07-07
    • Ki-Hun JeongSeung-Hwan ShimJoo-Han KimHong-Kee Chin
    • Ki-Hun JeongSeung-Hwan ShimJoo-Han KimHong-Kee Chin
    • G02F1/1333
    • H01L27/1214H01L27/1288H01L29/4908
    • A method of manufacturing a thin film transistor array substrate includes: forming a gate pattern on a substrate; forming a first gate insulating film and a second gate insulating film on the substrate; forming a source/drain pattern and a semiconductor pattern on the substrate; forming a passivation film on the substrate; forming a photo-resist pattern on the passivation film; patterning the passivation film using the photo-resist pattern to form a passivation film pattern, the patterning of the passivation film including over-etching the passivation film to form an open region in the passivation film; forming a transparent electrode film on the substrate; removing the photo-resist pattern and a portion of the transparent electrode film on the photo-resist pattern; and forming a pixel electrode on the first gate insulating layer.
    • 制造薄膜晶体管阵列基板的方法包括:在基板上形成栅极图案; 在所述基板上形成第一栅极绝缘膜和第二栅极绝缘膜; 在衬底上形成源极/漏极图案和半导体图案; 在衬底上形成钝化膜; 在钝化膜上形成光刻胶图案; 使用光刻胶图形图案化钝化膜以形成钝化膜图案,钝化膜的图案化包括过蚀刻钝化膜以在钝化膜中形成开放区域; 在基板上形成透明电极膜; 在所述光刻胶图案上除去所述光刻胶图案和所述透明电极膜的一部分; 以及在所述第一栅极绝缘层上形成像素电极。
    • 4. 发明授权
    • Thin-film transistor substrate and method of fabricating the same
    • 薄膜晶体管基板及其制造方法
    • US07858412B2
    • 2010-12-28
    • US12498534
    • 2009-07-07
    • Joo-Han KimKi-Hun JeongSeung-Hwan Shim
    • Joo-Han KimKi-Hun JeongSeung-Hwan Shim
    • H01L21/3213H01L21/336
    • H01L27/12H01L27/124H01L27/1248H01L27/1288Y10S438/951
    • A thin-film transistor (“TFT”) substrate and a method of fabricating the same include: an insulating substrate; gate wiring which is disposed on the insulating substrate and includes a gate line and a gate electrode; a semiconductor pattern which is disposed on the gate electrode; data wiring which is disposed on the semiconductor pattern and includes a data line, a source electrode, and a drain electrode; a passivation layer which includes a first sub-passivation layer and a second sub-passivation layer deposited on the data wiring; and a pixel electrode which is electrically connected to the drain electrode through a contact hole disposed in the passivation layer, wherein the second sub-passivation layer has a lower density than the first sub-passivation layer.
    • 薄膜晶体管(“TFT”)基板及其制造方法包括:绝缘基板; 栅极布线,其布置在所述绝缘基板上并且包括栅极线和栅电极; 设置在栅电极上的半导体图案; 数据布线,其布置在半导体图案上并且包括数据线,源电极和漏电极; 钝化层,其包括沉积在数据布线上的第一子钝化层和第二子钝化层; 以及通过设置在所述钝化层中的接触孔电连接到所述漏电极的像素电极,其中所述第二子钝化层具有比所述第一子钝化层更低的密度。