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1. 发明授权

US6136613A Method for recycling monitoring control wafers 失效
标题翻译：回收监控控制晶片的方法
公开(公告)号：US6136613A
公开(公告)日：2000-10-24
申请号：US82659
申请日：1998-05-21
申请人： Jen-Tsung Lin , Tsung-Hsien Han , Tang Yu
发明人： Jen-Tsung Lin , Tsung-Hsien Han , Tang Yu
IPC分类号： H01L23/544 , H01J37/317
CPC分类号： H01L22/34 , H01J2237/31701 , Y10S134/902
摘要： A method for recycling monitoring control wafers includes cleaning the wafers after performing a sheet resistance (Rs) measurement on a bare silicon monitoring control wafer of an ion implanter, and then converting the wafer into a recyclable control wafer. A recyclable control wafer for a thermal wave (TW) measurement of destruction can be obtained by forming a screen layer on the wafer, performing a TW measurement, performing ion implantation by the monitoring recipe, performing TW measurement again, performing ion drive-in to drive implanted ions into the deeper areas of the substrate, removing the screen layer, and then forming another screen layer on the wafer to put the wafer into the recycling process of a TW measurement.
摘要翻译：回收监控控制晶片的方法包括在离子注入机的裸硅监控控制晶片上执行薄层电阻（Rs）测量之后清洗晶片，然后将晶片转换成可回收的控制晶片。可以通过在晶片上形成屏幕层，执行TW测量，通过监视配方执行离子注入，再次执行TW测量，执行离子驱入，获得用于热波（TW）破坏测量的可回收控制晶片将注入的离子驱动到衬底的较深区域，去除屏幕层，然后在晶片上形成另一个屏幕层，以将晶片放入TW测量的再循环过程中。

2. 发明授权

US06065869A Method of in-line temperature monitoring 失效
标题翻译：在线温度监测方法
公开(公告)号：US06065869A
公开(公告)日：2000-05-23
申请号：US356962
申请日：1999-07-19
申请人： Jen-Tsung Lin , Da-Wen Shia , Tsung-Hsien Han , Eddie Chen
发明人： Jen-Tsung Lin , Da-Wen Shia , Tsung-Hsien Han , Eddie Chen
IPC分类号： G01K7/16
CPC分类号： G01K7/16
摘要： A method of in-line temperature monitoring. At least two control wafers and a monitor wafer are provided. A sacrificial layer is formed on each control wafer and the monitor wafer. Ions are implanted under a predetermined condition in the sacrificial layers. Thermal processes are performed on the control wafers at a higher and the lower limit of a target temperature to enable ions to move partially from the sacrificial layer to the control wafers. The sacrificial layers on the control wafers are subsequently removed. The sheet resistance of the control wafers is measured to obtain a first and the second resistance value, which respectively correspond to the first and second temperatures. A wafer and a monitor wafer are provided. A thermal process is performed on the monitor wafer and the wafer at the target temperature. The sacrificial layer of the monitor wafer is removed, and the sheet resistance of the monitor wafer is subsequently measured. When the sheet resistance of the monitor wafer is between the first and the second sheet resistance, the temperature is controlled between the first and second temperature, that is, a tolerable temperature range of the target temperature.
摘要翻译：一种在线温度监测方法。提供至少两个控制晶片和监视晶片。在每个控制晶片和监视器晶片上形成牺牲层。在牺牲层中的预定条件下植入离子。在目标温度的较高和下限处，在控制晶片上进行热处理，以使离子能够部分地从牺牲层移动到控制晶片。随后去除控制晶片上的牺牲层。测量控制晶片的薄层电阻以获得分别对应于第一和第二温度的第一和第二电阻值。提供晶片和监视器晶片。在目标温度下在监测晶片和晶片上进行热处理。去除监测晶片的牺牲层，随后测量监测晶片的薄层电阻。当监视器晶片的薄层电阻处于第一和第二薄层电阻之间时，在第一温度和第二温度之间，即目标温度的允许温度范围内控制温度。

3. 发明授权

US07358197B2 Method for avoiding polysilicon film over etch abnormal 有权
标题翻译：避免多晶硅膜蚀刻异常的方法
公开(公告)号：US07358197B2
公开(公告)日：2008-04-15
申请号：US10690665
申请日：2003-10-23
申请人： Bruce Han , Jen-Tsung Lin , Kuo-Ping Huang
发明人： Bruce Han , Jen-Tsung Lin , Kuo-Ping Huang
IPC分类号： H01L21/302
CPC分类号： C23C16/24 , H01L21/28035 , H01L21/28525
摘要： The method for avoiding polysilicon film over etch abnormal includes cleaning a semiconductor substrate. A dielectric layer is formed on the substrate. Subsequently, a first silicon source gas at a first flow rate is next performed injecting into a reaction chamber to form a first polysilicon film over the dielectric layer. Successively, a second silicon source gas at a second flow rate is performed injecting into the reaction chamber to form a second polysilicon film over the first polysilicon film, wherein the second silicon source gas having a different growth rate than the first silicon source gas. A patterned photoresist layer is then formed on the second polysilicon film. After the patterned photoresist layer is formed, a dry etching process by way of using the patterned photoresist layer as a etching mask is performed to etch through in turn the second polysilicon film and the first polysilicon film till exposing to the dielectric layer. Finally, the photoresist layer is removed.
摘要翻译：用于避免多晶硅膜超过蚀刻异常的方法包括清洁半导体衬底。在基板上形成电介质层。随后，接着进行第一流速的第一硅源气体的注入到反应室中，以在该介电层上形成第一多晶硅膜。接着，将第二流量的第二硅源气体注入到反应室中，以在第一多晶硅膜上形成第二多晶硅膜，其中第二硅源气体的生长速率与第一硅源气体不同。然后在第二多晶硅膜上形成图案化的光致抗蚀剂层。在形成图案化的光致抗蚀剂层之后，执行通过使用图案化的光致抗蚀剂层作为蚀刻掩模的干蚀刻工艺，依次蚀刻第二多晶硅膜和第一多晶硅膜直到暴露于电介质层。最后，去除光致抗蚀剂层。

4. 发明授权

US5882947A Method for probing the error of energy and dosage in the high-energy ion implantation 失效
标题翻译：探测高能离子注入能量和剂量误差的方法
公开(公告)号：US5882947A
公开(公告)日：1999-03-16
申请号：US906085
申请日：1997-08-05
申请人： Jen-Tsung Lin , Ben Chen , Eddie Chen
发明人： Jen-Tsung Lin , Ben Chen , Eddie Chen
IPC分类号： H01J37/317 , G01R31/26 , H01L21/66
CPC分类号： H01J37/3171 , H01J2237/30433 , H01J2237/31703
摘要： A method for probing the error of energy or dosage in the high-energy ion implantation is disclosed herein. The error source that is from either the energy of ion implantation or the dosage of ion implantation non-normal is decided via the thermal signal value and the thickness of the remained oxidation layer after etching step. The error source can be decided by using different decision standards for phosphorous ion implantation or boron ion implantation. The method comprises the steps as follow: a semiconductor silicon wafer is provided as a test wafer, and an oxidation layer is then formed over the test wafer. A high-energy ion implantation, such as phosphorous ion implantation or boron ion implantation is performed. The oxidation layer is etched via an etching process in a fixing etching time. The thickness of the remained oxidation layer after the etching process is probed. A thermal probe is applied to probe the thermal wave signal from the ion-implant-induced damage. Afterward, the thermal wave signal value and the remained oxidation thickness of the high-energy ion implantation are compared with that of a preceding standard group. Then, the different decision standards created from the thermal wave signal value and the remained oxidation thickness for the high-energy phosphorous or boron ion implantation process are submitted. The error source that is from either the energy of ion implantation or the dosage of ion implantation in non-normal state can be decided via the different decision standards.
摘要翻译：本文公开了一种用于探测高能离子注入中能量或剂量误差的方法。通过离子注入的能量或离子注入非正常的剂量的误差源通过热信号值和蚀刻步骤后剩余的氧化层的厚度来确定。误差源可以通过使用磷离子注入或硼离子注入的不同决策标准来决定。该方法包括以下步骤：提供半导体硅晶片作为测试晶片，然后在测试晶片上形成氧化层。进行高能离子注入，例如磷离子注入或硼离子注入。在定影蚀刻时刻通过蚀刻工艺蚀刻氧化层。探测蚀刻后剩余氧化层的厚度。应用热探针来探测离子植入物引起的损伤的热波信号。之后，将高能离子注入的热波信号值和剩余的氧化厚度与前面的标准组进行比较。然后，提出了从高能磷或硼离子注入工艺的热波信号值和剩余氧化厚度产生的不同决定标准。离子注入的能量或非正常状态下离子注入剂量的误差源可以通过不同的决策标准来决定。

5. 发明申请

US20050087510A1 Method for avoiding polysilicon film over etch abnormal 有权
标题翻译：避免多晶硅膜蚀刻异常的方法
公开(公告)号：US20050087510A1
公开(公告)日：2005-04-28
申请号：US10690665
申请日：2003-10-23
申请人： Bruce Han , Jen-Tsung Lin , Kuo-Ping Huang
发明人： Bruce Han , Jen-Tsung Lin , Kuo-Ping Huang
IPC分类号： C23C16/24 , H01L21/28 , H01L21/285 , H01B13/00
CPC分类号： C23C16/24 , H01L21/28035 , H01L21/28525
摘要： The method for avoiding polysilicon film over etch abnormal includes cleaning a semiconductor substrate. A dielectric layer is formed on the substrate. Subsequently, a first silicon source gas at a first flow rate is next performed injecting into a reaction chamber to form a first polysilicon film over the dielectric layer. Successively, a second silicon source gas at a second flow rate is performed injecting into the reaction chamber to form a second polysilicon film over the first polysilicon film, wherein the second silicon source gas having a different growth rate than the first silicon source gas. A patterned photoresist layer is then formed on the second polysilicon film. After the patterned photoresist layer is formed, a dry etching process by way of using the patterned photoresist layer as a etching mask is performed to etch through in turn the second polysilicon film and the first polysilicon film till exposing to the dielectric layer. Finally, the photoresist layer is removed.
摘要翻译：用于避免多晶硅膜超过蚀刻异常的方法包括清洁半导体衬底。在基板上形成电介质层。随后，接着进行第一流速的第一硅源气体的注入到反应室中，以在该介电层上形成第一多晶硅膜。接着，将第二流量的第二硅源气体注入到反应室中，以在第一多晶硅膜上形成第二多晶硅膜，其中第二硅源气体的生长速率与第一硅源气体不同。然后在第二多晶硅膜上形成图案化的光致抗蚀剂层。在形成图案化的光致抗蚀剂层之后，执行通过使用图案化的光致抗蚀剂层作为蚀刻掩模的干蚀刻工艺，依次蚀刻第二多晶硅膜和第一多晶硅膜直到暴露于电介质层。最后，去除光致抗蚀剂层。

6. 发明授权

US6014223A Method of determining the impurity concentration of impurity-doped polysilicon in semiconductor wafers 失效
标题翻译：确定半导体晶片中杂质掺杂多晶硅的杂质浓度的方法
公开(公告)号：US6014223A
公开(公告)日：2000-01-11
申请号：US862428
申请日：1999-05-23
申请人： Jen-Tsung Lin , Kuen-Chu Chen , Keng-Yuan Wu , Eddie Chen
发明人： Jen-Tsung Lin , Kuen-Chu Chen , Keng-Yuan Wu , Eddie Chen
IPC分类号： G01N21/17 , G01N21/55
CPC分类号： G01N21/17
摘要： A method for determining the impurity concentration of impurity-doped polysilicon layers in semiconductor wafers is provided. Through experiments, it is found that the reflectivity of an impurity-doped polysilicon layer is nearly a regular function of the impurity concentration thereof. Accordingly, an impurity-doped polysilicon layer having an unknown impurity concentration can be determined by first measuring the reflectivity thereof by illuminating the impurity-doped polysilicon layer with light, and then using mapping transformation to find the corresponding value of impurity concentration of the impurity-doped polysilicon layer. This method can be used instead of the conventional thermal wave method that often result in having to discard the wafers due to the incapability of reliably determining the impurity concentration of the polysilicon layers formed on the semiconductor wafers.
摘要翻译：提供了一种用于确定半导体晶片中杂质掺杂多晶硅层的杂质浓度的方法。通过实验，发现掺杂杂质的多晶硅层的反射率几乎是其杂质浓度的常规函数。因此，可以通过首先用光照射杂质掺杂多晶硅层来测量其反射率，然后使用映射变换来找出杂质浓度杂质浓度的杂质掺杂多晶硅层，掺杂多晶硅层。可以使用该方法代替通常导致由于不能确定形成在半导体晶片上的多晶硅层的杂质浓度而不能丢弃晶片的常规热波法。

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