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    • 3. 发明申请
    • Enclosure tamper detection and protection
    • 外壳防拆检测和保护
    • US20080042834A1
    • 2008-02-21
    • US11788616
    • 2007-04-20
    • James DaughtonJames Deak
    • James DaughtonJames Deak
    • G08B13/24
    • G01R33/093B82Y25/00G11C11/1695
    • A tamper detecting enclosure arrangement for enclosures containing an interior space in which a protected item is positioned having a magnetoresistive sensing memory storage cell positioned in or near the protected item in the enclosure having a two state offset magnetoresistance versus externally applied magnetic field. A magnet is positioned at a selected separation distance from the magnetoresistive sensing memory storage cell to thereby provide a magnetic field about the magnetoresistive sensing memory storage cell if said enclosure has not been opened in such a manner as to result in substantially increasing said separation distance.
    • 一种用于包含内部空间的篡改检测外壳装置,其中被保护物品被定位在其中,其具有位于所述外壳中的受保护物品内或附近的磁阻感测存储器单元,其具有与外部施加的磁场相对的两个状态偏移磁阻。 磁体位于与磁阻感测存储单元相隔一定距离的距离处,从而如果所述外壳未被打开,从而提供磁阻感测存储单元周围的磁场,导致大大增加所述间隔距离。
    • 4. 发明申请
    • Thermomagnetically assisted spin-momentum-transfer switching memory
    • 热磁辅助自旋动量转换开关存储器
    • US20060077707A1
    • 2006-04-13
    • US11249046
    • 2005-10-12
    • James Deak
    • James Deak
    • G11C11/14
    • H01L27/228G11C11/16
    • A ferromagnetic thin-film based digital memory having a substrate supporting bit structures that are electrically interconnected with information storage and retrieval circuitry and having first and second oppositely oriented relatively fixed magnetization layers and a ferromagnetic material film in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained. This ferromagnetic material film is separated from the first and second fixed magnetization films by corresponding layers of a nonmagnetic materials one being electrically insulative and that one remaining being electrically conductive. Each bit structure has an interconnection structure providing electrical contact thereto at a contact surface thereof substantially parallel to the intermediate layer positioned between the first contact surface and the substrate. A plurality of word line structures located across from a corresponding one of the bit structures on an opposite side. Electrical current selectively drawn through each of these bit structures and its interconnection structure can cause substantial heating of that bit structure to raise temperatures thereof while being above temperatures of at least an adjacent said bit structure because of sufficient thermal isolation.
    • 一种基于铁磁薄膜的数字存储器,其具有支撑位结构的衬底,所述衬底支撑位结构,其与信息存储和检索电路电互连并且具有第一和第二相对定向的相对固定的磁化层和铁磁材料膜,其中特性磁性能基本上保持在低于 相关的临界温度,高于该临界温度,这种磁性不能保持。 该铁磁材料膜通过非磁性材料的相应层与第一和第二固定磁化膜分离,一个是电绝缘的,另一个是导电的。 每个位结构具有在其基本平行于位于第一接触表面和衬底之间的中间层的接触表面处提供与其接触的互连结构。 多个字线结构,位于相对侧上的相应一个位结构的两侧。 通过这些位结构中的每一个及其互连结构选择性地拉伸的电流可以导致该位结构的实质加热,以便由于足够的热隔离而在至少相邻的所述位结构的温度之上升高其温度。
    • 6. 发明申请
    • System and method for reducing shorting in memory cells
    • 用于减少存储器单元短路的系统和方法
    • US20050079638A1
    • 2005-04-14
    • US10684967
    • 2003-10-14
    • Joel DrewesJames Deak
    • Joel DrewesJames Deak
    • H01L21/00H01L27/22
    • H01L27/222H01L43/08H01L43/12
    • An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.
    • MRAM器件包括具有由阻挡层隔开的上导电层和下导电层的磁存储单元的阵列。 为了减少跨越存储器单元的阻挡层的电短路的可能性,可以在上导电层周围形成间隔物,并且在已经蚀刻了磁存储单元的层之后,可以将存储单元氧化以转换任何导电颗粒 沿着存储器单元的侧壁沉积作为蚀刻工艺的副产物而形成非导电颗粒。 或者,下导电层可以重复进行部分氧化和部分蚀刻步骤,使得只有非导电颗粒可以作为蚀刻工艺的副产物沿着存储器单元的侧壁被抛出。
    • 7. 发明申请
    • Method for forming MRAM bit having a bottom sense layer utilizing electroless plating
    • 用于形成具有利用无电镀的底部感测层的MRAM钻头的方法
    • US20070161127A1
    • 2007-07-12
    • US11657725
    • 2007-01-25
    • Hasan NejadJames Deak
    • Hasan NejadJames Deak
    • H01L21/00
    • H01L27/222H01L43/12
    • The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.
    • 本发明提供一种形成MRAM单元的方法,该方法在制造期间使电短路的发生最小化。 沟槽中的第一导体设置在绝缘层中,并且绝缘层和第一导体的上表面被平坦化。 然后,电介质层被沉积成稍大于稍后形成的感应层的期望最终厚度的厚度。 然后对电介质层进行图案化和蚀刻,以形成第一导体上的电池形状的开口。 然后,将坡莫合金电镀在电池形状中以形成感测层。 感应层和电介质层被平坦化,然后沉积非磁性隧道势垒层。 最后,在隧道势垒层上方形成钉扎层。