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1. 发明申请

US20140118501A1 CALIBRATION SYSTEM FOR STEREO CAMERA AND CALIBRATION APPARATUS FOR CALIBRATING STEREO IMAGE 有权
标题翻译：用于校正立体图像的立体相机和校准装置的校准系统
公开(公告)号：US20140118501A1
公开(公告)日：2014-05-01
申请号：US14116458
申请日：2011-08-01
申请人： Je Woo Kim , Byeong Ho Choi , Dong Sun Kim , Hyok Song , Cheon Lee
发明人： Je Woo Kim , Byeong Ho Choi , Dong Sun Kim , Hyok Song , Cheon Lee
IPC分类号： G06T7/00
CPC分类号： G06T7/002 , G06T7/85 , H04N13/239 , H04N13/296
摘要： Disclosed is a calibration system for stereo cameras. The calibration system includes a rig control module configured to, when a camera calibration parameter is input, control an auto rig according to the camera calibration parameter to perform physical calibration for a camera, a stereo image calibration apparatus configured to calibrate a stereo image to acquire the camera calibration parameter, and output the acquired camera calibration parameter, and a camera control module configured to output the camera calibration parameter, which is input from the stereo image calibration apparatus, to the rig control module, or screen-output the camera calibration parameter. Therefore, physical calibration and image processing calibration for a camera are performed in association with each other.
摘要翻译：公开了用于立体照相机的校准系统。所述校准系统包括钻机控制模块，所述钻机控制模块被配置为当输入相机校准参数时，根据所述相机校准参数来控制自动钻机以执行相机的物理校准;立体图像校准装置，被配置为校准立体图像以获取相机校准参数，并输出所获取的相机校准参数，以及相机控制模块，被配置为将从立体图像校准装置输入的相机校准参数输出到钻机控制模块，或者屏幕输出相机校准参数。因此，对相机进行物理校准和图像处理校准。

2. 发明授权

US08178973B2 Copper wire, method for fabricating the same, and thin film transistor substrate with the same 有权
标题翻译：铜线，其制造方法以及具有该铜线的薄膜晶体管基板
公开(公告)号：US08178973B2
公开(公告)日：2012-05-15
申请号：US12314605
申请日：2008-12-12
申请人： Gyu Won Han , Dong Sun Kim , Won Joon Ho , Hee Jung Yang
发明人： Gyu Won Han , Dong Sun Kim , Won Joon Ho , Hee Jung Yang
IPC分类号： H01L33/40
CPC分类号： H01L23/53238 , H01L21/32051 , H01L21/76829 , H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908 , H01L2924/0002 , H01L2924/3011 , Y10T428/2958 , H01L2924/00
摘要： The present invention relates to a copper wire in a semiconductor device in which a barrier layer is formed for improving adhesion of a copper wire without any additional fabricating step; a method for fabricating the same, and a flat panel display device with the same. The copper wire includes a barrier layer formed on an underlying structure, and a copper conductive layer on the barrier layer, wherein the barrier layer includes at least one of a Cu2O layer and a CuOxNy layer.
摘要翻译：本发明涉及一种半导体器件中的铜线，其中形成阻挡层以改善铜线的附着，而无需任何额外的制造步骤; 其制造方法和具有该方法的平板显示装置。铜线包括形成在下面的结构上的阻挡层和阻挡层上的铜导电层，其中阻挡层包括Cu 2 O层和CuO x N y层中的至少一种。

3. 发明申请

US20110099807A1 Method of manufacturing printed circuit board 失效
标题翻译：制造印刷电路板的方法
公开(公告)号：US20110099807A1
公开(公告)日：2011-05-05
申请号：US12805293
申请日：2010-07-22
申请人： Dong Sun Kim , Taehoon Kim , Jong Seok Song , Sam Jin Her , Jun Heyoung Park
发明人： Dong Sun Kim , Taehoon Kim , Jong Seok Song , Sam Jin Her , Jun Heyoung Park
IPC分类号： H05K3/10 , H05K3/42
CPC分类号： H05K3/381 , H05K1/0346 , H05K3/108 , H05K3/146 , H05K3/426 , H05K3/4644 , H05K2201/0154 , H05K2201/0959 , H05K2201/096 , H05K2203/092 , Y10S428/901 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T428/24917
摘要： A fabrication method which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The method for fabricating a printed circuit board includes: providing an insulating material; forming in the insulating material at least one via-hole for interlayer electrical connection; ion beam treating the surface of the insulating material having the via-hole formed therein; forming a copper seed layer on the surface-treated insulating material using a vacuum deposition process; and plating a copper pattern on the copper seed layer to form a circuit pattern.
摘要翻译：通过实现超薄精细电路图案，能够提高电性能，缩短加工时间，减小芯片封装的厚度的制造方法。制造印刷电路板的方法包括：提供绝缘材料; 在所述绝缘材料中形成至少一个用于层间电连接的通孔; 离子束处理其中形成有通孔的绝缘材料的表面; 使用真空沉积工艺在表面处理的绝缘材料上形成铜种子层; 并在铜籽晶层上镀铜图案以形成电路图案。

4. 发明授权

US06352888B1 Method of fabricating SRAM cell having a field region 有权
标题翻译：制造具有场区域的SRAM单元的方法
公开(公告)号：US06352888B1
公开(公告)日：2002-03-05
申请号：US09478490
申请日：2000-01-06
申请人： Dong Sun Kim
发明人： Dong Sun Kim
IPC分类号： H01L218234
CPC分类号： H01L27/11 , H01L27/1112 , Y10S257/903
摘要： A static random access memory (SRAM) cell includes first and second load devices, first and second access transistors, first and second drive transistors, and two bit lines. The SRAM includes a substrate; an active region in the substrate, the active region being formed in a direction; gate electrodes of the first and second access transistors crossing the active region, the gate electrodes of the first and second access transistors are parallel with each other; gate electrodes of the first and second drive transistors crossing the active region, the gate electrodes of the first and second drive transistors are parallel with each other; and first and second load devices on the gate electrodes of the first and second access transistors, the first and second load devices are parallel with each other.
摘要翻译：静态随机存取存储器（SRAM）单元包括第一和第二负载器件，第一和第二存取晶体管，第一和第二驱动晶体管以及两个位线。 SRAM包括基板; 在所述衬底中的有源区，所述有源区沿一个方向形成; 第一和第二存取晶体管的栅电极与有源区交叉，第一和第二存取晶体管的栅电极彼此平行; 第一和第二驱动晶体管的栅电极与有源区交叉，第一和第二驱动晶体管的栅电极彼此平行; 以及在第一和第二存取晶体管的栅电极上的第一和第二负载装置，第一和第二负载装置彼此平行。

5. 发明授权

US6114213A Fabrication method for a capacitor having high capacitance 有权
标题翻译：具有高电容的电容器的制造方法
公开(公告)号：US6114213A
公开(公告)日：2000-09-05
申请号：US431048
申请日：1999-11-01
申请人： Dong Sun Kim
发明人： Dong Sun Kim
IPC分类号： H01L27/04 , H01L21/02 , H01L21/306 , H01L21/318 , H01L21/822 , H01L21/8242 , H01L27/06 , H01L27/108 , H01L21/8222
CPC分类号： H01L28/82 , H01L27/0629 , H01L28/87 , H01L28/91
摘要： A fabrication method for a capacitor having high capacitance that increases capacitance of a capacitor and consequently decreases defective semiconductor devices includes: forming a doped first polysilicon layer pattern on a semiconductor substrate; forming a silicide film pattern on the first polysilicon layer pattern; annealing the semiconductor substrate; sequentially forming a first insulating film and a second insulating film over the silicide film pattern; forming a contact hole to expose a portion of the silicide film pattern and then sequentially placing the semiconductor substrate in an etchant solution and a buffered etchant solution to remove a portion of the first insulating film formed on the silicide film pattern; forming a first capacitor electrode on a portion of an upper surface of the second insulating film pattern and the silicide film pattern, and at inner walls of the contact hole; and forming a dielectric layer on an outer surface of the lower electrode and then a second capacitor electrode.
摘要翻译：一种具有高电容的电容器的制造方法，该电容器增加电容器的电容，从而减少有缺陷的半导体器件，包括：在半导体衬底上形成掺杂的第一多晶硅层图案; 在所述第一多晶硅层图案上形成硅化物膜图案; 退火半导体衬底; 在硅化物膜图案上依次形成第一绝缘膜和第二绝缘膜; 形成接触孔以暴露硅化物膜图案的一部分，然后依次将半导体衬底放置在蚀刻溶液和缓冲蚀刻溶液中以去除在硅化物膜图案上形成的第一绝缘膜的一部分; 在第二绝缘膜图案和硅化物膜图案的上表面的一部分上以及在接触孔的内壁处形成第一电容器电极; 以及在所述下电极的外表面上形成电介质层，然后形成第二电容电极。

6. 发明授权

US6043167A Method for forming low dielectric constant insulating film 失效
标题翻译：低介电常数绝缘膜的形成方法
公开(公告)号：US6043167A
公开(公告)日：2000-03-28
申请号：US947503
申请日：1997-10-10
申请人： Young Hie Lee , Dong Sun Kim , Jin Won Park
发明人： Young Hie Lee , Dong Sun Kim , Jin Won Park
IPC分类号： C23C16/42 , C23C16/30 , C23C16/50 , C23C16/517 , H01L21/31 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L21/469
CPC分类号： C23C16/517 , C23C16/30 , H01L21/3127 , H01L21/314 , Y10S438/958
摘要： The method for forming an insulating film having a low dielectric constant, which is suitable for intermetal insulating film applications, by plasma enhanced chemical vapor deposition (PECVD) includes the step of supplying a first source gas containing fluorine and carbon to a dual-frequency, high density plasma reactor. The method also includes the step of supplying a second source gas containing silicon dioxide to the reactor. In this manner a fluorocarbon/silicon dioxide film is formed on a substrate in the reactor.
摘要翻译：通过等离子体增强化学气相沉积（PECVD）形成适合于金属间绝缘膜应用的具有低介电常数的绝缘膜的方法包括将含有氟和碳的第一源气体供应到双频，高密度等离子体反应器。该方法还包括向反应器供应含有二氧化硅的第二源气体的步骤。以这种方式，在反应器中的基底上形成碳氟化合物/二氧化硅膜。

7. 发明授权

US08107574B2 Filter tuning circuit for wireless communication system 有权
标题翻译：无线通信系统滤波器调谐电路
公开(公告)号：US08107574B2
公开(公告)日：2012-01-31
申请号：US12200366
申请日：2008-08-28
申请人： Yeon Kug Moon , Tae Ho Hwang , Dong Sun Kim , Kwang Ho Won , Yong Kuk Park
发明人： Yeon Kug Moon , Tae Ho Hwang , Dong Sun Kim , Kwang Ho Won , Yong Kuk Park
IPC分类号： H04B1/10
CPC分类号： H04L25/0288 , H04L25/0272
摘要： A filter tuning circuit for a wireless communication system is provided. A filter tuning circuit includes a comparator and a counter which control a transconvertance value of a differential transconverter to tune a filter.
摘要翻译：提供了一种用于无线通信系统的滤波器调谐电路。滤波器调谐电路包括比较器和计数器，其控制差分转换器的跨转换值来调谐滤波器。

8. 发明授权

US08065798B2 Method of manufacturing printed circuit board 失效
公开(公告)号：US08065798B2
公开(公告)日：2011-11-29
申请号：US12805293
申请日：2010-07-22
申请人： Dong Sun Kim , Taehoon Kim , Jong Seok Song , Sam Jin Her , Jun Heyoung Park
发明人： Dong Sun Kim , Taehoon Kim , Jong Seok Song , Sam Jin Her , Jun Heyoung Park
IPC分类号： H01K13/00 , H01B13/00
CPC分类号： H05K3/381 , H05K1/0346 , H05K3/108 , H05K3/146 , H05K3/426 , H05K3/4644 , H05K2201/0154 , H05K2201/0959 , H05K2201/096 , H05K2203/092 , Y10S428/901 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T428/24917
摘要： A fabrication method which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The method for fabricating a printed circuit board includes: providing an insulating material; forming in the insulating material at least one via-hole for interlayer electrical connection; ion beam treating the surface of the insulating material having the via-hole formed therein; forming a copper seed layer on the surface-treated insulating material using a vacuum deposition process; and plating a copper pattern on the copper seed layer to form a circuit pattern.

9. 发明申请

US20100223069A1 METHOD FOR MONITORING ERROR IN PRESCRIPTION DATA EMPLOYING BARCODE SYSTEM 审中-公开
标题翻译：用于监控使用条形码系统的预约数据中的错误的方法
公开(公告)号：US20100223069A1
公开(公告)日：2010-09-02
申请号：US12680605
申请日：2007-09-29
申请人： Dong Sun Kim
发明人： Dong Sun Kim
IPC分类号： G06Q10/00 , G06Q50/00 , G06F17/30 , G08B21/00
CPC分类号： G06Q10/00 , G06Q50/00 , G06Q50/22
摘要： The present invention relates to a method for monitoring error in prescription data employing barcode system comprising the steps of recording a dosage type and dose of a medicament in a prescription order by way of encoding those in a form of barcode, inputting information recorded in the barcode-prescription order, comparing the information with a database information about the prescribed medicament, and displaying the appropriateness of the dosage type and dose of the medicament. In accordance with the method for monitoring error in prescription data employing barcode system of the invention, the error in prescription data including dosage types and doses of prescribed medicaments can be reconsidered, which makes possible its practical application for the treatment of diseases in a more safe manner.
摘要翻译：本发明涉及一种使用条形码系统监测处方数据错误的方法，包括以下步骤：通过以条形码的形式对那些以条形码进行编码的方式，以处方顺序记录药物的剂量类型和剂量，输入记录在条形码中的信息处方顺序，将信息与数据库信息进行比较，并显示药物的剂量类型和剂量的适当性。根据本发明的条形码系统的处方数据的误差监测方法，可以重新考虑处方数据的误差，包括剂量类型和剂量等，这样可以更加安全地治疗疾病的实际应用方式。

10. 发明授权

US07707716B2 Method of manufacturing build-up printed circuit board 失效
标题翻译：制造印刷电路板的方法
公开(公告)号：US07707716B2
公开(公告)日：2010-05-04
申请号：US11709215
申请日：2007-02-22
申请人： Jong Seok Song , Taehoon Kim , Dong Sun Kim , Hye Yeon Cha
发明人： Jong Seok Song , Taehoon Kim , Dong Sun Kim , Hye Yeon Cha
IPC分类号： H01K3/10
CPC分类号： H05K3/381 , H05K3/108 , H05K3/146 , H05K3/4069 , H05K3/426 , H05K3/4602 , H05K2201/0959 , H05K2203/092 , H05K2203/1152 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing a build-up printed circuit board, in which the circuit of a build-up printed circuit board including a core layer and an outer layer is realized by forming the metal seed layer of the core layer using a dry process, consisting of ion beam surface treatment and vacuum deposition, instead of a conventional wet process, including a wet surface roughening process and electroless plating. When the wet process is replaced with the dry process in the method of the invention, the circuit layer can be formed in an environmentally friendly manner, and as well, all circuit layers of the substrate including the core layer and the outer layer can be manufactured through a semi-additive process. Further, the peel strength between the resin substrate and the metal layer can be increased, thus realizing a highly reliable fine circuit.
摘要翻译：一种积层印刷电路板的制造方法，其中通过使用干法形成芯层的金属种子层来实现包括芯层和外层的积层印刷电路板的电路，其包括的离子束表面处理和真空沉积，而不是常规的湿法，包括湿表面粗糙化处理和无电镀。当在本发明的方法中用干法代替湿法时，电路层可以以环境友好的方式形成，并且可以制造包括芯层和外层的基片的所有电路层通过半加成过程。此外，可以提高树脂基板和金属层之间的剥离强度，从而实现高可靠性的精细电路。

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