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    • 5. 发明授权
    • Method of fabricating non-volatile memory device
    • 制造非易失性存储器件的方法
    • US06897115B2
    • 2005-05-24
    • US10643538
    • 2003-08-19
    • In-Soo ChoJae-Min YuByung-Goo JeonJun-Yeoul YouChang-Yup Lee
    • In-Soo ChoJae-Min YuByung-Goo JeonJun-Yeoul YouChang-Yup Lee
    • G11C7/00H01L21/336H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L27/11521H01L27/115
    • A method of fabricating a non-volatile memory device includes the steps of forming a lower conductive layer on a substrate, forming a lower and an upper sacrificial patterns on the substrate with the lower conductive layer, wherein the lower and upper sacrificial patterns include a trench exposing the lower conductive layer, forming mask spacers on sidewalls of the upper and lower sacrificial patterns, using the mask spacers and the upper sacrificial pattern as an etch mask, etching the exposed lower conductive layer to form a lower conductive pattern exposing the substrate, forming a plug conductive layer covering an entire surface of a substrate with the lower conductive pattern, and planarizingly etching the plug conductive layer until the lower sacrificial pattern is exposed, thereby forming a source plug in a gap region between the mask spacers that is connected to the substrate.
    • 一种制造非易失性存储器件的方法包括以下步骤:在衬底上形成下导电层,在下导电层上在衬底上形成下牺牲图形和上牺牲图案,其中下和下牺牲图案包括沟槽 暴露下导电层,使用掩模间隔物和上牺牲图案作为蚀刻掩模在上和下牺牲图案的侧壁上形成掩模间隔物,蚀刻暴露的下导电层以形成露出基板的下导电图案,形成 插入导电层,其覆盖具有下导电图案的基板的整个表面,并且平坦化地蚀刻插头导电层,直到下部牺牲图案露出为止,从而在连接到所述屏蔽间隔物之间​​的间隙区域中形成源极插塞 基质。