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1. 发明授权

US5861328A Method of fabricating GMR devices 失效
标题翻译：制造GMR器件的方法
公开(公告)号：US5861328A
公开(公告)日：1999-01-19
申请号：US723438
申请日：1996-10-07
申请人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu , Clarence J. Tracy
发明人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu , Clarence J. Tracy
IPC分类号： H01L27/06 , H01L43/12 , H01L21/8238
CPC分类号： H01L43/12 , H01L27/0688
摘要： A method of fabricating GMR devices on a CMOS substrate structure with a semiconductor device formed therein. The method includes forming a dielectric system with a planar surface having a roughness in a range of 1 .ANG. to 20 .ANG. RMS on the substrate; disposing and patterning films of giant magneto-resistive material on the planar surface so as to form a memory cell; disposing a dielectric cap on the cell so as to seal the cell and provide a barrier to subsequent operations; forming vias through the dielectric cap and the dielectric system to interconnects of the semiconductor device; forming vias through the dielectric cap to the magnetic memory cell; and depositing a metal system through the vias to the interconnects and to the memory cell.
摘要翻译：一种在其上形成有半导体器件的CMOS衬底结构上制造GMR器件的方法。该方法包括形成具有平坦表面的电介质系统，该平面表面在衬底上的粗糙度范围为1安培至20安培RMS; 在平坦表面上设置和构图巨磁阻材料的薄膜以形成记忆单元; 在电池上设置电介质盖，以密封电池并为后续操作提供屏障; 通过所述电介质盖和所述介电系统形成通孔以连接所述半导体器件; 通过介电盖形成通孔到磁存储单元; 以及通过所述通孔将金属系统沉积到所述互连件和所述存储器单元。

2. 发明授权

US5768183A Multi-layer magnetic memory cells with improved switching characteristics 失效
标题翻译：具有改进的开关特性的多层磁存储单元
公开(公告)号：US5768183A
公开(公告)日：1998-06-16
申请号：US723159
申请日：1996-09-25
申请人： Xiaodong T. Zhu , Saied N. Tehrani , Mark Durlam , Eugene Chen
发明人： Xiaodong T. Zhu , Saied N. Tehrani , Mark Durlam , Eugene Chen
IPC分类号： G11C11/15 , G11C11/56
CPC分类号： G11C11/5607 , G11C11/15 , G11C2211/5615
摘要： A plurality of layers of magnetic material are stacked in parallel, overlying relationship and separated by layers of non-magnetic material so as to form a multi-layer magnetic memory cell. The width of the cell is less than a width of magnetic domain walls within the magnetic layers so that magnetic vectors in the magnetic layers point along a length of the magnetic layers, and the ratio of the length to the width of the magnetic memory cell is in a range of 1.5 to 10. The magnetic layers are antiferromagnetically coupled when the ratio is less than 4 and ferromagnetically coupled when the ratio is greater than 4.
摘要翻译：多层磁性材料以平行的方式堆叠叠置，由非磁性材料层隔开，形成多层磁性存储单元。电池的宽度小于磁性层内的磁畴壁的宽度，使得磁性层中的磁矢量沿着磁性层的长度指向，并且磁性存储单元的长度与宽度的比率是在1.5至10的范围内。当该比率小于4时，磁性层反铁磁耦合，并且当该比率大于4时被磁化耦合。

3. 发明授权

US5699293A Method of operating a random access memory device having a plurality of pairs of memory cells as the memory device 失效
标题翻译：操作具有多对存储单元的随机存取存储器件作为存储器件的方法
公开(公告)号：US5699293A
公开(公告)日：1997-12-16
申请号：US728023
申请日：1996-10-09
申请人： Saied N. Tehrani , Xiaodong T. Zhu , Eugene Chen , Mark Durlam
发明人： Saied N. Tehrani , Xiaodong T. Zhu , Eugene Chen , Mark Durlam
IPC分类号： G11C11/15 , G11C11/16 , G11C11/00
CPC分类号： G11C11/15 , G11C11/16
摘要： A magnetic random access memory device (10) has a plurality of pairs of memory cells (21a,21b), a column decoder (31), a row decoder (32), and a comparator (60). The pair of memory cells (21a,21b) is designated by column decoder (31) and row decoder (32) in response to a memory address. Complementary bits ("0" and "1") are stored in the pair of memory cells (21a,21b). When the state in the pair of memory cell (21a,21b) is read, both bits in the pair of memory cells (21a,21b) are compared to produce an output at one read cycle time to a bit line (70). This memory device omits a conventional auto-zeroing step so that a high speed MRAM device can be attained.
摘要翻译：磁性随机存取存储器件（10）具有多对存储单元（21a，21b），列解码器（31），行解码器（32）和比较器（60）。响应于存储器地址，由列解码器（31）和行解码器（32）指定该对存储单元（21a，21b）。互补位（“0”和“1”）存储在一对存储单元（21a，21b）中。当读出该对存储单元（21a，21b）中的状态时，将该对存储单元（21a，21b）中的两个位进行比较，以在一个读周期时间向位线（70）产生输出。该存储器件省略了常规的自动归零步骤，从而可以获得高速MRAM器件。

4. 发明授权

US5631196A Method for making inversion mode diamond electron source 失效
标题翻译：制作反型金刚石电子源的方法
公开(公告)号：US5631196A
公开(公告)日：1997-05-20
申请号：US385027
申请日：1995-02-07
申请人： Robert C. Kane , Xiaodong T. Zhu
发明人： Robert C. Kane , Xiaodong T. Zhu
IPC分类号： H01J1/308 , H01L21/465
CPC分类号： H01J1/308
摘要： An electron source including selectively impurity doped semiconductor diamond wherein regions of selectively impurity doped regions are inverted with respect to the charge carrier population to provide a conductive path traversed by electrons subsequently emitted into a free-space region from the electron emitter. An inversion mode electron emission device including a selectively impurity doped semiconductor diamond electron emitter, for emitting electrons; a control electrode; and an anode for collecting emitted electrons wherein operation of the device relies on the inducement of an inversion region to facilitate electron transit to an electron emitting surface of the electron emitter.
摘要翻译：包括选择性杂质掺杂的半导体金刚石的电子源，其中选择性杂质掺杂区域的区域相对于电荷载流子群反转，以提供随后从电子发射体发射到自由空间区域的电子穿过的导电路径。一种反相模式电子发射装置，包括用于发射电子的选择性掺杂杂质的半导体金刚石电子发射体; 控制电极; 以及用于收集发射电子的阳极，其中器件的操作依赖于反转区域的诱导以促进电子转移到电子发射器的电子发射表面。

5. 发明授权

US5430348A Inversion mode diamond electron source 失效
标题翻译：反转模式金刚石电子源
公开(公告)号：US5430348A
公开(公告)日：1995-07-04
申请号：US276879
申请日：1994-07-18
申请人： Robert C. Kane , Xiaodong T. Zhu
发明人： Robert C. Kane , Xiaodong T. Zhu
IPC分类号： H01J1/304 , H01J1/308 , H01J1/30
CPC分类号： H01J1/308
摘要： An electron source including selectively impurity doped semiconductor diamond wherein regions of selectively impurity doped regions are inverted with respect to the charge carrier population to provide a conductive path traversed by electrons subsequently emitted into a free-space region from the electron emitter. An inversion mode electron emission device including a selectively impurity doped semiconductor diamond electron emitter, for emitting electrons; a control electrode; and an anode for collecting emitted electrons wherein operation of the device relies on the inducement of an inversion region to facilitate electron transit to an electron emitting surface of the electron emitter.
摘要翻译：包括选择性杂质掺杂的半导体金刚石的电子源，其中选择性杂质掺杂区域的区域相对于电荷载流子群反转，以提供随后从电子发射体发射到自由空间区域的电子穿过的导电路径。一种反相模式电子发射装置，包括用于发射电子的选择性掺杂杂质的半导体金刚石电子发射体; 控制电极; 以及用于收集发射电子的阳极，其中器件的操作依赖于反转区域的诱导以促进电子转移到电子发射器的电子发射表面。

6. 发明授权

US5424560A Integrated multicolor organic led array 失效
标题翻译：集成多色有机LED阵列
公开(公告)号：US5424560A
公开(公告)日：1995-06-13
申请号：US251440
申请日：1994-05-31
申请人： Michael P. Norman , Thomas B. Harvey, III , Xiaodong T. Zhu
发明人： Michael P. Norman , Thomas B. Harvey, III , Xiaodong T. Zhu
IPC分类号： G09F13/20 , G09F9/00 , G09F13/22 , H01L27/32 , H01L51/50 , H01L51/56 , H05B33/10 , H05B33/12 , H05B33/14 , H05B33/26 , H01L33/00
CPC分类号： H01L27/3209 , H01L51/5012 , G09F13/22 , H01L27/3211 , H01L27/3281 , H01L51/56 , Y10S148/099
摘要： An integrated multicolor organic LED array formed by providing a negative layer and patterning a plurality of different color LED organic layers, one at a time, on the negative layer to form a plurality of different color LEDs in a plurality of areas of a selected array. A first color LED organic layer is patterned on the negative layer in first areas and to define additional areas for additional LEDs laterally separated from the first color LEDs and a final color LED organic layer is deposited in final areas and on previously patterned layers to form a plurality of final color LEDs. Transparent positive contacts are then formed on the final color LED layer in the first and final areas so as to form positive contacts to the first and the final color LEDs.
摘要翻译：一种集成的多色有机LED阵列，其通过在负层上提供负层和一次一个地构图多个不同颜色的LED有机层而形成，以在所选阵列的多个区域中形成多个不同颜色的LED。第一颜色的LED有机层被图案化在第一区域的负层上并且为从第一颜色LED横向分离的附加LED限定另外的区域，并且最后的彩色LED有机层沉积在最终区域中并且在预先图案化的层上形成多个最终的彩色LED。然后在第一和最后区域中的最终的彩色LED层上形成透明的正触点，以便与第一和最终的彩色LED形成正接触。

7. 发明授权

US5734605A Multi-layer magnetic tunneling junction memory cells 失效
标题翻译：多层磁隧道结记忆单元
公开(公告)号：US5734605A
公开(公告)日：1998-03-31
申请号：US711751
申请日：1996-09-10
申请人： Xiaodong T. Zhu , Herbert Goronkin , Saied N. Tehrani
发明人： Xiaodong T. Zhu , Herbert Goronkin , Saied N. Tehrani
IPC分类号： G11C11/15 , G11C11/16 , G11C11/56 , H01L21/8246
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/15 , G11C11/16 , G11C11/5607 , H01L27/224 , G11C2211/5615 , G11C2211/5616
摘要： A multi-state, multi-layer magnetic memory cell including a first conductor, a first magnetic layer contacting the first conductor, an insulating layer on the first magnetic layer, a second magnetic layer on the insulating layer, a second conductor contacting the second magnetic layer, and a word line adjacent, or in contact with, the cell so as to provide a magnetic field to partially switch magnetic vectors along the length of the first magnetic layer. Information is stored by passing one current through the word line and a second current through the first and second conductors sufficient to switch vectors in the first and second magnetic layers. Sensing is accomplished by passing a read current through a word line sufficient to switch one layer (and not the other) and a sense current through the cell, by way of the first and second conductors, and measuring a resistance across the cell.
摘要翻译：一种多态多层磁存储单元，包括第一导体，与第一导体接触的第一磁性层，第一磁性层上的绝缘层，绝缘层上的第二磁性层，与第二磁性体接触的第二导体层，以及与单元相邻或接触的字线，以便提供磁场以沿着第一磁性层的长度部分地切换磁矢量。通过使一条电流通过字线并通过第一和第二导体的第二电流足以切换第一和第二磁性层中的矢量来存储信息。通过使读取电流通过足以通过第一和第二导体切换一层（而不是另一层）和感测电流通过电池的读取电流，并测量电池两端的电阻来实现感测。

8. 发明授权

US5563087A Method of fabricating InAs/GaSb/AlSb material system SRAM 失效
标题翻译：制造InAs / GaSb / AlSb材料系统SRAM的方法
公开(公告)号：US5563087A
公开(公告)日：1996-10-08
申请号：US494465
申请日：1995-06-26
申请人： Jun Shen , Saied N. Tehrani , Herbert Goronkin , Xiaodong T. Zhu
发明人： Jun Shen , Saied N. Tehrani , Herbert Goronkin , Xiaodong T. Zhu
IPC分类号： H01L21/8244 , H01L27/11 , H01L21/70 , H01L27/00
CPC分类号： B82Y30/00 , B82Y10/00 , H01L27/11 , Y10S438/979
摘要： An SRAM including first and second RITDs each formed with a heterostructure including a GaSb active layer sandwiched between AlSb barrier layers, which are sandwiched between InAs layers with each RITD having a contact connected to a first of the InAs layers. A TD including an AlSb layer sandwiched between InAS layers. A second InAs layer for each of the RITDs being integrally formed with a first InAs layer of the TD and a read/write terminal connected to a second InAs layer of the TD.
摘要翻译：一种包括第一和第二RITD的SRAM，每个RITD均形成有异质结构，该异质结构包括夹在AlSb阻挡层之间的GaSb活性层，它们夹在InAs层之间，每个RITD具有连接到第一InAs层的触点。包括夹在InAS层之间的AlSb层的TD。用于与TD的第一InAs层整体形成的每个RITD的第二InAs层和连接到TD的第二InAs层的读/写端子。

9. 发明授权

US5414274A Quantum multifunction transistor with gated tunneling region 失效
标题翻译：量子多功能晶体管与门控隧道区
公开(公告)号：US5414274A
公开(公告)日：1995-05-09
申请号：US96387
申请日：1993-07-26
申请人： Herbert Goronkin , Saied N. Tehrani , Jun Shen , Xiaodong T. Zhu
发明人： Herbert Goronkin , Saied N. Tehrani , Jun Shen , Xiaodong T. Zhu
IPC分类号： H01L29/06 , H01L29/68 , H01L29/772 , H01L29/205 , H01L29/88
CPC分类号： H01L29/772
摘要： A quantum multifunction transistor including a plurality of conduction layers of semiconductor material with a tunnel barrier layer sandwiched therebetween. The conduction layers each being very thin to form discrete energy levels, and the material being chosen so that discrete energy levels therein are not aligned across the tunnel barrier layer in an equilibrium state. A gate coupled to a portion of one of the conduction layers for aligning, in response to a voltage applied thereto, discrete energy levels in the conduction layers across the tunnel barrier layer, whereby majority carrier current flows through the transistor. Application of a higher voltage to the gate results in minority carrier current flow through the transistor.
摘要翻译：一种量子多功能晶体管，包括多个导电层的半导体材料，其间夹有隧道势垒层。导电层各自非常薄以形成离散的能级，并且选择材料使得其中的离散能级在平衡状态下不跨越隧道势垒层对准。耦合到导电层之一的一部分的栅极，用于响应于施加到其上的电压，对准穿过隧道势垒层的导电层中的离散能级，从而多数载流子流过晶体管。向栅极施加较高的电压导致少数载流子流过晶体管。

10. 发明授权

US5748524A MRAM with pinned ends 失效
标题翻译： MRAM带固定端
公开(公告)号：US5748524A
公开(公告)日：1998-05-05
申请号：US701355
申请日：1996-09-23
申请人： Eugene Chen , Saied N. Tehrani , Ronald N. Legge , Xiaodong T. Zhu
发明人： Eugene Chen , Saied N. Tehrani , Ronald N. Legge , Xiaodong T. Zhu
IPC分类号： G11C11/15 , G11C11/16 , G11C11/56
CPC分类号： G11C11/5607 , G11C11/15 , G11C11/16 , G11C2211/5616
摘要： A multi-layer magnetic memory cell is provided, with magnetic end vectors adjacent the ends of the cell pinned in a fixed direction. To pin the magnetic end vectors, a magnetic field is applied to an end of at least one of the layers of magnetic material in the cell to move the magnetic end vectors in the magnetic material at the end of the cell into a fixed direction. Pinning material is then disposed adjacent to the end to maintain the magnetic end vectors in the magnetic material at the end of the cell in the fixed direction.
摘要翻译：提供了一个多层磁存储单元，其磁端向量靠近固定在固定方向上的单元端。为了固定磁端向量，在单元中至少一层磁性材料的一端施加磁场，使磁性材料端端的磁端矢量移动到固定方向。然后将钉扎材料设置成与端部相邻，以将磁端向量保持在固定方向上的电池端部的磁性材料中。

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