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1. 发明授权

US07633288B2 Method of testing semiconductor devices and handler used for testing semiconductor devices 有权
标题翻译：用于测试半导体器件的半导体器件和处理器的测试方法
公开(公告)号：US07633288B2
公开(公告)日：2009-12-15
申请号：US11527378
申请日：2006-09-27
申请人： Ae-Yong Chung , Eun-Seok Lee , Ki-Sang Kang , Kyeong-Seon Shin
发明人： Ae-Yong Chung , Eun-Seok Lee , Ki-Sang Kang , Kyeong-Seon Shin
IPC分类号： G01R31/28 , G01R31/26
CPC分类号： G01R31/2893
摘要： Example embodiments may provide a method of testing semiconductor devices by identifying units of lots and a test tray such that a plurality of lots having semiconductor devices may be continuously tested by a handler. Example embodiments may also provide a handler used to test the semiconductor devices.
摘要翻译：示例性实施例可以提供通过识别批量单元和测试托盘来测试半导体器件的方法，使得具有半导体器件的多个批次可以由处理器连续测试。示例性实施例还可以提供用于测试半导体器件的处理器。

2. 发明申请

US20070039127A1 Dust container of upright type vacuum cleaner and supporting structure for cover thereof 失效
标题翻译：立式吸尘器的防尘容器及其盖的支撑结构
公开(公告)号：US20070039127A1
公开(公告)日：2007-02-22
申请号：US11504579
申请日：2006-08-16
申请人： Sang Kang
发明人： Sang Kang
IPC分类号： A47L9/16
CPC分类号： A47L9/165 , A47L9/1658 , A47L9/1666 , A47L9/1683 , B04C5/06 , B04C2009/004
摘要： A dust container of an upright type vacuum cleaner, and a supporting structure for a cover of the dust container are disclosed. The dust container comprises a circular cover having a suction port and an exhaust port, a guide member attached to a lower surface of the cover to guide an air flow, a filter attached to a lower surface of the guide member, and a cylindrical container body provided to the lower surface of the cover to receive the guide member and the filter. The supporting structure for the cover comprises a supporting member positioned within the container body to support the filter such that the filter supports the cover. The cover has the suction port and the exhaust port, respectively, enhancing a suction force of the vacuum cleaner, and preventing deformation of the cover even when a vacuum degree is increased by operation of the vacuum cleaner.
摘要翻译：公开了一种直立式真空吸尘器的贮尘容器和用于贮尘容器盖的支撑结构。贮尘容器包括具有吸入口和排气口的圆形罩，安装在盖的下表面以引导空气流的引导构件，附接到引导构件的下表面的过滤器和圆柱形容器主体提供到盖的下表面以接收引导构件和过滤器。盖的支撑结构包括定位在容器主体内的支撑构件以支撑过滤器，使得过滤器支撑盖。盖子分别具有吸入口和排气口，增强了吸尘器的抽吸力，并且即使当通过真空吸尘器的操作使真空度增加时也防止了盖子的变形。

3. 发明申请

US20070004586A1 Arylphenoxy catalyst system for producing ethylene homopolymer or copolymers of ethylene and alpha-olefins 审中-公开
标题翻译：用于生产乙烯均聚物或乙烯和α-烯烃共聚物的芳基苯氧基催化剂体系
公开(公告)号：US20070004586A1
公开(公告)日：2007-01-04
申请号：US11280930
申请日：2005-11-15
申请人： Tae Woo , Myung Ok , Jong Hahn , Mal Lee , Sang Kang , Sung Ko , Tae Kim , Sung Kim
发明人： Tae Woo , Myung Ok , Jong Hahn , Mal Lee , Sang Kang , Sung Ko , Tae Kim , Sung Kim
IPC分类号： C08F4/44 , B01J31/00
CPC分类号： C07F17/00 , C08F4/65908 , C08F4/65912 , C08F10/00 , C08F110/02 , C08F210/16 , C08F2420/03 , C08F4/6592 , C08F2500/12 , C08F210/14
摘要： The present invention relates to an arylphenoxy catalyst system producing an ethylene homopolymer or copolymers of ethylene and α-olefins, and a method of producing an ethylene homopolymer or copolymers of ethylene and α-olefins having a high molecular weight under a high temperature solution polymerization condition using the same. The catalyst system includes a group IV arylphenoxy-based transition metal catalyst and an aluminoxane cocatalyst or a boron compound cocatalyst. In the transition metal catalyst, a cyclopentadiene derivative and arylphenoxide as fixed ligands are located around the group IV transition metal, arylphenoxide is substituted with at least one aryl derivative and is located at the ortho position thereof, and the ligands are not crosslinked to each other. The catalyst includes an environmentally-friendly raw material, synthesis of the catalyst is economical, and thermal stability of the catalyst is excellent. It is useful for producing an ethylene homopolymer or copolymers of ethylene and α-olefins having various physical properties in commercial polymerization processes.
摘要翻译：本发明涉及一种生产乙烯均聚物或乙烯与α-烯烃的共聚物的芳基苯氧基催化剂体系，以及在高温溶液聚合条件下生产具有高分子量的乙烯均聚物或乙烯与α-烯烃的共聚物的方法使用相同催化剂体系包括IV族芳基苯氧基基过渡金属催化剂和铝氧烷助催化剂或硼化合物助催化剂。在过渡金属催化剂中，作为固定配体的环戊二烯衍生物和芳基苯氧基位于IV族过渡金属周围，芳基酚被至少一个芳基衍生物取代，位于其邻位，配体彼此不交联。催化剂包括环保原料，催化剂的合成是经济的，催化剂的热稳定性优异。在商业聚合方法中生产具有各种物理性质的乙烯均聚物或乙烯和α-烯烃的共聚物是有用的。

4. 发明申请

US20060231760A1 Compensation circuit for compensating non-uniformity according to change of operating temperature of bolometer 有权
标题翻译：补偿电路根据测辐射热量计的工作温度变化补偿不均匀性
公开(公告)号：US20060231760A1
公开(公告)日：2006-10-19
申请号：US11327461
申请日：2006-01-09
申请人： Hee Lee , Chi Hwang , Yong Lee , Sang Kang
发明人： Hee Lee , Chi Hwang , Yong Lee , Sang Kang
IPC分类号： G01J5/00
CPC分类号： G01J5/24 , H04N5/33 , H04N5/3651 , H04N5/3655
摘要： The present invention relates to a bolometer, and more specifically to a compensation circuit for compensating non-uniformity due to the difference of operating temperature between bolometers which exist in bolometer array using semiconductor material. A compensation circuit according to the present invention comprises a biasing part including a first transistor generating bias current according to the change of operating temperature to have a dependency of exponential function for the operating temperature of circuit, and a second transistor turned on/off according to the column signal of a bolometer array; a bolometer part including a variable resistor for detecting IR in a pixel base, a third transistor turned on/off according to the column signal of a bolometer array coupled to one end of the variable resistor, and a fourth transistor turned on/off according to the row signal of a bolometer array coupled to the other end of the variable resistor; and an off-set compensation part for compensating the non-uniformity of the bolometer unit.
摘要翻译：本发明涉及测辐射热计，更具体地说，涉及一种用于补偿不均匀性的补偿电路，这是由于存在于使用半导体材料的测辐射热计阵列中的测辐射热量计之间的工作温度差异。根据本发明的补偿电路包括偏置部分，其包括第一晶体管，根据工作温度的变化产生偏置电流，以使电路的工作温度具有指数函数的依赖性，并且根据第测辐射热计阵列的列信号; 一个测辐射热计部分，包括用于检测像素基础中的IR的可变电阻器，第三晶体管根据耦合到可变电阻器的一端的测辐射热计阵列的列信号导通/截止，以及第四晶体管根据耦合到可变电阻器的另一端的测辐射热计阵列的行信号; 以及用于补偿测辐射热计单元的不均匀性的偏移补偿部分。

5. 发明申请

US20060158087A1 Shadow mask for cathode ray tubes 失效
标题翻译：阴影射线管阴影面具
公开(公告)号：US20060158087A1
公开(公告)日：2006-07-20
申请号：US11302467
申请日：2005-12-14
申请人： Min Lim , Jin Park , Sang Kang
发明人： Min Lim , Jin Park , Sang Kang
IPC分类号： H01J29/81
CPC分类号： H01J29/076 , H01J2229/0755
摘要： Disclosed herein is a shadow mask for cathode ray tubes. When the width of a smaller hole part of each of slots formed at the shadow mask is defined as Sw, the horizontal distance between the end of a taper-shaped larger hole part facing the panel side of each of the slots, which is adjacent to the edge part of the shadow mask, and the end of the smaller hole part, which is adjacent to the edge part of the shadow mask, is defined as Ta, and the incident angle at which the electron beam passes through each of the slots is defined as θ, the shadow mask has at least one slot through which the electron beam passes at an incident angle θ of above 47 degrees, and the at least one slot through which the electron beam passes at an incident angle θ of above 47 degrees is configured such that the following inequality is satisfied: 1
摘要翻译：本文公开了阴极射线管的荫罩。当形成在荫罩处的每个槽的较小孔部分的宽度被定义为Sw时，与每个狭槽的面板侧相对的锥形较大孔部分的端部之间的水平距离阴影掩模的边缘部分和与荫罩的边缘部分相邻的较小孔部分的端部被定义为Ta，并且电子束通过每个狭槽的入射角为被定义为θ，荫罩具有至少一个狭槽，电子束以高于47度的入射角θ穿过该槽，并且电子束以高于47度的入射角θ通过的至少一个槽是被配置为使得满足以下不等式：1

6. 发明授权

US07886206B2 Semiconductor memory test device and method thereof 有权
标题翻译：半导体存储器测试装置及其方法
公开(公告)号：US07886206B2
公开(公告)日：2011-02-08
申请号：US12385116
申请日：2009-03-31
申请人： Je-Young Park , Ki-Sang Kang
发明人： Je-Young Park , Ki-Sang Kang
IPC分类号： G11C29/00
CPC分类号： G11C29/56 , G11C29/56008 , G11C2029/1806 , G11C2029/5606
摘要： A semiconductor memory test device and method thereof are provided. The example semiconductor memory test device may include a fail memory configured to store at least one test result of a memory under test, a mode selecting unit configured to output a selection signal for selecting a memory address protocol of the fail memory based upon which one of a plurality of test modes is active in the memory under test and an address arranging unit configured to arrange address signals to conform with the selected memory address protocol in response to the selection signal received from the mode selecting unit.
摘要翻译：提供半导体存储器测试装置及其方法。示例半导体存储器测试设备可以包括被配置为存储被测存储器的至少一个测试结果的故障存储器，模式选择单元，被配置为输出用于选择故障存储器的存储器地址协议的选择信号，多个测试模式在待测存储器中是有效的，并且地址排列单元被配置为响应于从模式选择单元接收的选择信号而布置地址信号以符合所选择的存储器地址协议。

7. 发明授权

US07533310B2 Semiconductor memory test device and method thereof 有权
标题翻译：半导体存储器测试装置及其方法
公开(公告)号：US07533310B2
公开(公告)日：2009-05-12
申请号：US11640893
申请日：2006-12-19
申请人： Je-Young Park , Ki-Sang Kang
发明人： Je-Young Park , Ki-Sang Kang
IPC分类号： G11C29/00
CPC分类号： G11C29/56 , G11C29/56008 , G11C2029/1806 , G11C2029/5606
摘要： A semiconductor memory test device and method thereof are provided. The example semiconductor memory test device may include a fail memory configured to store at least one test result of a memory under test, a mode selecting unit configured to output a selection signal for selecting a memory address protocol of the fail memory based upon which one of a plurality of test modes is active in the memory under test and an address arranging unit configured to arrange address signals to conform with the selected memory address protocol in response to the selection signal received from the mode selecting unit.
摘要翻译：提供半导体存储器测试装置及其方法。示例半导体存储器测试设备可以包括被配置为存储被测存储器的至少一个测试结果的故障存储器，模式选择单元，被配置为输出用于选择故障存储器的存储器地址协议的选择信号，多个测试模式在待测存储器中是有效的，并且地址排列单元被配置为响应于从模式选择单元接收的选择信号而布置地址信号以符合所选择的存储器地址协议。

8. 发明申请

US20080110809A1 Multifunctional handler system for electrical testing of semiconductor devices 有权
标题翻译：用于半导体器件电气测试的多功能处理器系统
公开(公告)号：US20080110809A1
公开(公告)日：2008-05-15
申请号：US11983635
申请日：2007-11-09
申请人： Seong-goo Kang , Jun-ho Lee , Ki-sang Kang , Hyun-seop Shim , Do-young Kam , Jae-il Lee , Ju-il Kang
发明人： Seong-goo Kang , Jun-ho Lee , Ki-sang Kang , Hyun-seop Shim , Do-young Kam , Jae-il Lee , Ju-il Kang
IPC分类号： G01R31/28 , B07C5/344 , G01R31/319 , B65G65/02
CPC分类号： H01L21/67282 , G01R31/2867 , G01R31/2893 , H01L21/67271 , Y10S414/135
摘要： A multifunctional handler system for electrical testing of semiconductor devices is provided. The multifunctional handler system comprises: (1) a semiconductor device processing section comprising a loading unit including a buffer, a sorting unit including a separate marking machine, and a unloading unit; (2) a semiconductor device testing section, separate from the semiconductor device processing section, comprises a test chamber, the test chamber is separated into two or more test spaces, and the test spaces of the test chamber include a second chamber positioned at a lower position, a first chamber positioned above the second chamber, and pipelines for connecting the first and second chambers to each other; and (3) a host computer which is independently connected to the semiconductor device processing section and the semiconductor device testing section and controls tray information, test results, marking information, and test program information.
摘要翻译：提供了一种用于半导体器件的电测试的多功能处理器系统。多功能处理器系统包括：（1）半导体器件处理部分，包括包括缓冲器的加载单元，包括单独的标记机的分拣单元和卸载单元; （2）与半导体器件处理部分分离的半导体器件测试部分包括测试室，测试室被分离成两个或更多个测试空间，并且测试室的测试空间包括位于下部的第二室位置，位于第二室上方的第一室以及用于将第一和第二室彼此连接的管道; 和（3）独立地连接到半导体器件处理部分和半导体器件测试部分并且控制托盘信息，测试结果，标记信息和测试程序信息的主计算机。

9. 发明申请

US20080077389A1 APPARATUS FOR DEVELOPING A TRANSFER DICTIONARY USED IN TRANFER-BASED MACHINE TRANSLATION SYSTEM 失效
标题翻译：用于开发基于平台的机器翻译系统中使用的传送词典的装置
公开(公告)号：US20080077389A1
公开(公告)日：2008-03-27
申请号：US11949406
申请日：2007-12-03
申请人： Seong Kim , Chang Min , Sang Kang , Jeong Cha
发明人： Seong Kim , Chang Min , Sang Kang , Jeong Cha
IPC分类号： G06F17/28 , G06F17/21
CPC分类号： G06F17/2735
摘要： Generating a transfer dictionary used in a transfer-based translation machine system. A pair of source/target language sentences are received. The source language sentence comprises at least one marked idiom, at least one argument and at least one marked collocation. The target language sentence comprises the target language translation for the idiom and the source language word(s) for the argument. The source language sentence is parsed to generate a source language syntactic tree. Nodes are extracted from the source language syntactic tree. A least common ancestor node of the extracted nodes is calculated and source language structure information is generated based on the source language syntactic tree data structure. Target language structure information is generated by adding the part-of-speech information to each morpheme in the target language sentence and by replacing each source language word in the target language with the corresponding syntactic information within the source language syntactic tree.
摘要翻译：生成基于转移的翻译机系统中使用的传输字典。接收一对源/目标语言句子。源语句包括至少一个标记的成语，至少一个参数和至少一个标记的搭配。目标语言句子包括成语的目标语言翻译和参数的源语言单词。解析源语句来生成源语言句法树。从源语言句法树中提取节点。计算提取节点的最小共同祖先节点，并根据源语言句法树数据结构生成源语言结构信息。目标语言结构信息是通过将目标语言句子中的每个语素添加词性信息，并用目标语言中的每个源语言词与源语言句法树中的对应句法信息相加产生的。

10. 发明申请

US20080023765A1 Semiconductor Devices and Methods of Fabricating the Same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080023765A1
公开(公告)日：2008-01-31
申请号：US11756122
申请日：2007-05-31
申请人： Taek-Soo Jeon , In-Sang Kang , Sang-Bom Kang , Hong-Bae Park , Hag-Ju Cho , Hye-Lan Lee
发明人： Taek-Soo Jeon , In-Sang Kang , Sang-Bom Kang , Hong-Bae Park , Hag-Ju Cho , Hye-Lan Lee
IPC分类号： H01L27/01 , H01L21/00
CPC分类号： H01L29/78 , H01L21/28044 , H01L21/28088 , H01L21/823828 , H01L29/42372 , H01L29/4966
摘要： Provided are semiconductor devices and methods of fabricating the semiconductor devices. Embodiments of such methods may include sequentially forming a gate insulation layer and a metal layer on a semiconductor substrate and etching the metal layer to form a metallic residue on the gate insulation layer. Such methods may also include monitoring an etch by-product to detect an etch endpoint for stopping the etching and forming a polysilicon layer on the gate insulation layer including the metallic residue.
摘要翻译：提供半导体器件和制造半导体器件的方法。这些方法的实施例可以包括在半导体衬底上依次形成栅极绝缘层和金属层，并蚀刻金属层以在栅极绝缘层上形成金属残留物。这样的方法还可以包括监测蚀刻副产物以检测用于停止蚀刻的蚀刻终点并在包括金属残留物的栅极绝缘层上形成多晶硅层。

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