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    • 1. 发明授权
    • Conductive metal oxide structures in non volatile re writable memory devices
    • 非易失性可重写存储器件中的导电金属氧化物结构
    • US08565006B2
    • 2013-10-22
    • US13719106
    • 2012-12-18
    • Lawrence SchlossJulie Casperson BrewerWayne KinneyRene Meyer
    • Lawrence SchlossJulie Casperson BrewerWayne KinneyRene Meyer
    • G11C13/00
    • H01L45/085G11C11/5685G11C13/0007G11C13/003G11C2013/0073G11C2213/56G11C2213/71G11C2213/72G11C2213/74G11C2213/76
    • A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).
    • 公开了包括与导电金属氧化物(CMO)接触的电解绝缘体的存储元件的存储单元。 CMO包括晶体结构并且可以包含烧绿石氧化物,导电二元氧化物,多个B位钙钛矿和Ruddlesden-Popper结构。 CMO包括可以响应于施加在电解绝缘体和CMO上施加的写入电压产生的适当幅度和方向的电场,可以将其输送到电解绝缘体/从电解绝缘体传输的移动离子。 存储器单元可以包括与存储元件电串联的非欧姆器件(NOD)。 存储器单元可以位于单层存储器中的两端交叉点存储器阵列中的导电阵列线的交叉点或多个垂直堆叠的存储器层之间,该衬底层在衬底上制造,该衬底包括用于数据的有源电路 对数组层进行操作。
    • 3. 发明授权
    • Conductive metal oxide structures in non volatile re writable memory devices
    • 非易失性可重写存储器件中的导电金属氧化物结构
    • US08320161B2
    • 2012-11-27
    • US13252932
    • 2011-10-04
    • Lawrence SchlossJulie Casperson BrewerWayne KinneyRene Meyer
    • Lawrence SchlossJulie Casperson BrewerWayne KinneyRene Meyer
    • G11C11/21
    • H01L45/085G11C11/5685G11C13/0007G11C13/003G11C2013/0073G11C2213/56G11C2213/71G11C2213/72G11C2213/74G11C2213/76
    • A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).
    • 公开了包括与导电金属氧化物(CMO)接触的电解绝缘体的存储元件的存储单元。 CMO包括晶体结构并且可以包含烧绿石氧化物,导电二元氧化物,多个B位钙钛矿和Ruddlesden-Popper结构。 CMO包括可以响应于施加在电解绝缘体和CMO上施加的写入电压产生的适当幅度和方向的电场,可以将其输送到电解绝缘体/从电解绝缘体传输的移动离子。 存储器单元可以包括与存储元件电串联的非欧姆器件(NOD)。 存储器单元可以位于单层存储器中的两端交叉点存储器阵列中的导电阵列线的交叉点或多个垂直堆叠的存储器层之间,该衬底层在衬底上制造,该衬底包括用于数据的有源电路 对数组层进行操作。
    • 5. 发明申请
    • Structures And Methods For Facilitating Enhanced Cycling Endurance Of Memory Accesses To Re-Writable Non Volatile Two Terminal Memory Elements
    • 用于促进增强的循环耐久性的结构和方法访问可重写的非易失性两个终端存储器元件
    • US20130043452A1
    • 2013-02-21
    • US13210342
    • 2011-08-15
    • Rene MeyerJian WuJulie Casperson Brewer
    • Rene MeyerJian WuJulie Casperson Brewer
    • H01L45/00H01L21/8239
    • H01L27/2463H01L27/101H01L45/08H01L45/147H01L45/1616
    • Structures and methods to enhance cycling endurance of BEOL memory elements are disclosed. In some embodiments, a memory element can include a support layer having a smooth and planar upper surface as deposited or as created by additional processing. A first electrode is formed the smooth and planar upper surface. The support layer can be configured to influence the formation of the first electrode to determine a substantially smooth surface of the first electrode. The memory element is formed over the first electrode having the substantially smooth surface, the memory element including one or more layers of an insulating metal oxide (IMO) operative to exchange ions to store a plurality of resistive states. The substantially smooth surface of the first electrode provides for uniform current densities through unit cross-sectional areas of the IMO. The memory element can include one or more layers of a conductive metal oxide (CMO).
    • 公开了增强BEOL存储元件的循环耐久性的结构和方法。 在一些实施例中,存储元件可以包括具有沉积的平滑和平坦的上表面的支撑层,或者通过附加处理产生的支撑层。 第一电极形成平滑且平坦的上表面。 支撑层可以被配置为影响第一电极的形成,以确定第一电极的基本平滑的表面。 存储元件形成在具有基本平滑表面的第一电极之上,存储元件包括一层或多层绝缘金属氧化物(IMO),其可操作以交换离子以存储多个电阻状态。 第一电极的基本平滑的表面通过IMO的单元横截面区域提供均匀的电流密度。 存储元件可以包括一层或多层导电金属氧化物(CMO)。
    • 10. 发明申请
    • Memory and methods of forming the same to enhance scalability of non-volatile two-terminal memory cells
    • 存储器和形成方法,以增强非易失性两端存储单元的可扩展性
    • US20110151617A1
    • 2011-06-23
    • US12653895
    • 2009-12-18
    • Julie Casperson Brewer
    • Julie Casperson Brewer
    • H01L21/16
    • H01L27/101G11C13/0007G11C2013/0073G11C2213/71
    • Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to scale memory elements, such as implemented in BEOL third dimensional memory technology, independent of operational characteristics. In at least some embodiments, a method to fabricate a non-volatile two-terminal memory device includes depositing a first electrode at a first temperature in a first region in relation to a substrate (e.g., a silicon wafer) that includes active circuitry that was previously fabricated FEOL on the substrate, fabricating a memory element coupled to the first electrode, and optionally, forming at least a portion of a non-ohmic device electrically coupled with the memory element. Further, the method can include depositing a second electrode at a second temperature in a second region in relation to the substrate. In some embodiments, the second temperature is approximately equal to or greater than the first temperature.
    • 本发明的实施例一般涉及半导体和存储器技术,更具体地涉及系统,集成电路和用于缩放存储元件的方法,诸如在BEOL第三维存储器技术中实现的,与操作特性无关。 在至少一些实施例中,制造非易失性双端存储器件的方法包括相对于衬底(例如,硅晶片)在第一区域中的第一温度下沉积第一电极,该衬底包括有源电路 在衬底上预先制造的FEOL,制造耦合到第一电极的存储元件,以及可选地形成与存储元件电耦合的非欧姆器件的至少一部分。 此外,该方法可以包括在相对于衬底的第二区域中在第二温度下沉积第二电极。 在一些实施例中,第二温度近似等于或大于第一温度。