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1. 发明申请

US20220011408A1 Silicon Waveguide Photodetector For In-Line Power Monitoring 有权
公开(公告)号：US20220011408A1
公开(公告)日：2022-01-13
申请号：US17483894
申请日：2021-09-24
申请人： Meer Nazmus Sakib , Ranjeet Kumar , Haisheng Rong , Chaoxuan Ma
发明人： Meer Nazmus Sakib , Ranjeet Kumar , Haisheng Rong , Chaoxuan Ma
IPC分类号： G01S7/481 , G01S7/4863 , G02B6/12
摘要： In one embodiment, an apparatus includes: a waveguide formed of a PN junction, the waveguide to propagate optical power, the PN junction having a P region adjacent to an N region; and a silicon monitor photodetector formed of the PN junction and in-line with the waveguide to measure the optical power. The silicon monitor photodetector may further be formed of a P-doped region adjacent to the P region and an N-doped region adjacent to the N region. Other embodiments are described and claimed.

2. 发明申请

US20180059446A1 OPTICAL ISO-MODULATOR 审中-公开
公开(公告)号：US20180059446A1
公开(公告)日：2018-03-01
申请号：US15250745
申请日：2016-08-29
申请人： Woosung Kim , John Heck , Haisheng Rong , Jeffrey B. Driscoll , Kimchau N. Nguyen
发明人： Woosung Kim , John Heck , Haisheng Rong , Jeffrey B. Driscoll , Kimchau N. Nguyen
IPC分类号： G02F1/095 , G02B6/12 , G02F1/09 , G02F1/00
CPC分类号： G02F1/0955 , G02B6/12002 , G02B6/12004 , G02B6/125 , G02B6/126 , G02B6/30 , G02F1/0036 , G02F1/092
摘要： Apparatuses, methods and storage medium associated with an optical iso-modulator are disclosed herein. In embodiments, an apparatus may include an optical waveguide formed on one or more layers, such as an isolation layer and a handling layer. A modulator driver may be coupled to a first side of the one or more layers. A magneto-optical (MO) die may be coupled to a second side of the one or more layers that is opposite the first side. Other embodiments may be disclosed and/or claimed.

3. 发明授权

US08588570B2 Two-photon-absorption-based silicon waveguide photo-power monitor 失效
标题翻译：双光子吸收型硅波导光功率监视器
公开(公告)号：US08588570B2
公开(公告)日：2013-11-19
申请号：US12895578
申请日：2010-09-30
申请人： Haisheng Rong , I-Wei Andy Hsieh , Mario J. Paniccia
发明人： Haisheng Rong , I-Wei Andy Hsieh , Mario J. Paniccia
IPC分类号： G02B6/12
CPC分类号： H01L22/14 , H01L22/34
摘要： Instead of monitoring the optical power coming out of a waveguide, a direct method of monitoring the optical power inside the waveguide without affecting device or system performance is provided. A waveguide comprises a p-i-n structure which induces a TPA-generated current and may be enhanced with reverse biasing the diode. The TPA current may be measured directly by probing metal contacts provided on the top surface of the waveguide, and may enable wafer-level testing. The p-i-n structures may be implemented at desired points throughout an integrated network, and thus allows probing of different devices for in-situ power monitor and failure analysis.
摘要翻译：提供了监视波导中的光功率而不是监视波导内的光功率而不影响设备或系统性能的直接方法。波导包括p-i-n结构，其诱导TPA产生的电流并且可以通过反向偏置二极管来增强。可以通过探测设置在波导顶表面上的金属触点直接测量TPA电流，并且可以实现晶片级测试。 p-i-n结构可以在整个集成网络中的所需点处实现，并且因此允许探测用于原位功率监测和故障分析的不同设备。

4. 发明申请

US20130279844A1 EFFICIENT BACKSIDE-EMITTING/COLLECTING GRATING COUPLER 有权
标题翻译：有效的背景发光/收集镀层耦合器
公开(公告)号：US20130279844A1
公开(公告)日：2013-10-24
申请号：US13976377
申请日：2011-12-15
申请人： Yun-chung Na , Haisheng Rong
发明人： Yun-chung Na , Haisheng Rong
IPC分类号： G02B6/12 , G02B6/136
CPC分类号： G02B6/12 , G02B6/1228 , G02B6/124 , G02B6/132 , G02B6/136 , G02B6/4204 , G02B6/4214
摘要： Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside vertical optical coupler functions to couple light to/from a plane in the PIC chip defined by thin film layers through a bulk thickness of the PIC chip substrate to emit/collect via a backside surface of the PIC chip where it is to be coupled by an off-chip component, such as an optical fiber. Embodiments of a grating-based backside vertical optical coupler include a grating coupler with a grating formed in a topside surface of the thin film A reflector is disposed over the grating coupler to reflect light emitted from the grating coupler through the substrate to emit from the backside of the PIC chip or to reflect light collected from the backside of the PIC chip through the substrate and to the grating coupler.
摘要翻译：具有背面垂直光耦合器的光电集成电路（PIC）芯片，并封装成光发射机/接收机。基于光栅的背面垂直光耦合器用于将光与薄膜层定义的PIC芯片中的平面耦合通过PIC芯片基板的体积厚度，以经由PIC芯片的背面发射/收集，由诸如光纤的片外部件耦合。基于光栅的背面垂直光耦合器的实施例包括具有形成在薄膜的顶侧表面上的光栅的光栅耦合器A反射器设置在光栅耦合器上方以将从光栅耦合器发射的光反射通过衬底从背面发射或者通过基板和光栅耦合器反射从PIC芯片背面收集的光。

5. 发明申请

US20110073989A1 OPTICAL MODULATOR UTILIZING WAFER BONDING TECHNOLOGY 有权
标题翻译：光学调制器利用波形粘结技术
公开(公告)号：US20110073989A1
公开(公告)日：2011-03-31
申请号：US12567645
申请日：2009-09-25
申请人： Haisheng Rong , Ansheng Liu
发明人： Haisheng Rong , Ansheng Liu
IPC分类号： H01L29/94 , H01L21/30
CPC分类号： H01L29/94 , G02F1/025 , G02F2001/0152 , G02F2202/105 , H01L21/76254 , H01L29/66181
摘要： Optical modulator utilizing wafer bonding technology. An embodiment of a method includes etching a silicon on insulator (SOI) wafer to produce a first part of a silicon waveguide structure on a first surface of the SOI wafer, and preparing a second wafer, the second wafer including a layer of crystalline silicon, the second wafer including a first surface of crystalline silicon. The method further includes bonding the first surface of the second wafer with a thin oxide to the first surface of the SOI wafer using a wafer bonding technique, wherein a second part of the silicon waveguide structure is etched in the layer of crystalline silicon.
摘要翻译：采用晶圆键合技术的光调制器。一种方法的实施例包括蚀刻绝缘体上硅（SOI）晶片以在SOI晶片的第一表面上产生硅波导结构的第一部分，以及制备第二晶片，所述第二晶片包括晶体硅层，所述第二晶片包括晶体硅的第一表面。该方法还包括使用晶片接合技术将第二晶片的第一表面与薄氧化物结合到SOI晶片的第一表面，其中硅波导结构的第二部分被蚀刻在晶体硅层中。

6. 发明申请

US20110073972A1 VERTICAL MIRROR IN A SILICON PHOTONIC CIRCUIT 有权
标题翻译：硅胶电路中的垂直镜
公开(公告)号：US20110073972A1
公开(公告)日：2011-03-31
申请号：US12567601
申请日：2009-09-25
申请人： John Heck , Ansheng Liu , Michael T. Morse , Haisheng Rong
发明人： John Heck , Ansheng Liu , Michael T. Morse , Haisheng Rong
IPC分类号： H01L31/0232 , H01L21/306
CPC分类号： H01L31/02327 , G02B6/4214
摘要： A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.
摘要翻译：垂直全内反射（TIR）镜及其制造是通过使用晶体硅蚀刻创建入门轮廓而制成的。从SOI晶片开始，使用深硅蚀刻来暴露掩埋氧化物层，然后将其湿法蚀刻（在HF中），打开Si器件层的底表面。然后将该底部硅表面暴露，使得在晶体刻蚀中，所得到的形状是具有刻面的重入梯形。这些刻面可以与平面硅波导结合使用以基于TIR原理向上反射光。或者，光可以从晶片上方耦合到硅波导中，用于晶片级测试。

7. 发明申请

US20210119710A1 OPTICAL COHERENT RECEIVER ON A CHIP 有权
公开(公告)号：US20210119710A1
公开(公告)日：2021-04-22
申请号：US17133360
申请日：2020-12-23
申请人： Meer Nazmus Sakib , Peicheng Liao , Ranjeet Kumar , Duanni Huang , Haisheng Rong , Harel Frish , John Heck , Chaoxuan Ma , Hao Li , Ganesh Balamurugan
发明人： Meer Nazmus Sakib , Peicheng Liao , Ranjeet Kumar , Duanni Huang , Haisheng Rong , Harel Frish , John Heck , Chaoxuan Ma , Hao Li , Ganesh Balamurugan
IPC分类号： H04B10/61
摘要： Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

8. 发明申请

US20170336565A1 SINGLE MODE OPTICAL COUPLER 审中-公开
公开(公告)号：US20170336565A1
公开(公告)日：2017-11-23
申请号：US15282728
申请日：2016-09-30
申请人： Judson D. Ryckman , Harel Frish , George A. Ghiurcan , Ansheng Liu , Haisheng Rong , Pradeep Srinivasan , Carsten Brandt , Isako Hoshino , Michael A. Creighton
发明人： Judson D. Ryckman , Harel Frish , George A. Ghiurcan , Ansheng Liu , Haisheng Rong , Pradeep Srinivasan , Carsten Brandt , Isako Hoshino , Michael A. Creighton
IPC分类号： G02B6/14 , G02B1/115 , G02B6/122 , G02B6/136 , G02B6/12
CPC分类号： G02B6/14 , G02B1/115 , G02B6/1228 , G02B6/136 , G02B2006/12097 , G02B2006/12104 , G02B2006/12147 , G02B2006/12157
摘要： Embodiments of the present disclosure are directed toward techniques and configurations for a single mode optical coupler device. In some embodiments, the device may include a multi-stage optical taper to convert light from a first mode field diameter to a second mode field diameter larger than the first mode field diameter, and a mirror formed in a dielectric layer under an approximately 45 degree angle with respect to a plane of the dielectric layer to reflect light from the multi-stage optical taper substantially perpendicularly to propagate the light in a single mode fashion. Other embodiments may be described and/or claimed.

9. 发明授权

US09791641B2 Inverted 45° mirror for photonic integrated circuits 有权
公开(公告)号：US09791641B2
公开(公告)日：2017-10-17
申请号：US14884430
申请日：2015-10-15
申请人： John Heck , Haisheng Rong
发明人： John Heck , Haisheng Rong
IPC分类号： G02B6/12 , H01L21/00 , G02B6/26 , H01L21/306 , G02B6/42 , G02B6/122 , G02B6/136
CPC分类号： G02B6/4214 , G02B6/122 , G02B6/136 , G02B6/26 , G02B6/42 , G02B6/4208 , G02B2006/12104 , H01L21/30604
摘要： Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.

10. 发明申请

US20160139350A1 INVERTED 45 DEGREE MIRROR FOR PHOTONIC INTEGRATED CIRCUITS 有权
标题翻译：用于光电集成电路的反相45度镜
公开(公告)号：US20160139350A1
公开(公告)日：2016-05-19
申请号：US14884430
申请日：2015-10-15
申请人： John HECK , Haisheng RONG
发明人： John HECK , Haisheng RONG
IPC分类号： G02B6/42 , G02B6/136 , G02B6/122
CPC分类号： G02B6/4214 , G02B6/122 , G02B6/136 , G02B6/26 , G02B6/42 , G02B6/4208 , G02B2006/12104 , H01L21/30604
摘要： Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.
摘要翻译：反向45°半导体镜作为PIC芯片的垂直光耦合器，特别是光接收器和发射器。反向45°半导体反射镜用于耦合由薄膜层限定的PIC芯片中的平面与垂直于PIC芯片的顶表面的方向耦合光，其中它可以由芯片外部件（例如电线终端。在一个示例性实施例中，立方晶体半导体的（110）面可以提供相对于要从其发射光的半导体的（100）表面倒置的45°刻面。在另外的实施例中，可以通过对绝缘体上半导体（SOI）衬底的器件层进行底切来暴露（110）面。或者，预蚀刻的衬底表面可以结合到处理晶片，变薄，然后用于PIC波导形成。

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