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1. 发明授权

US08722454B2 Method for manufacturing organic electronic component having salt compound 有权
标题翻译：制造具有盐化合物的有机电子部件的方法
公开(公告)号：US08722454B2
公开(公告)日：2014-05-13
申请号：US13668451
申请日：2012-11-05
申请人： Hsin-Fei Meng , Hao-Wu Lin , Sheng-Fu Horng , Hsiao-Wen Zan , Hao-Wen Chang , Yu-Fan Chang , Yu-Chian Chiu
发明人： Hsin-Fei Meng , Hao-Wu Lin , Sheng-Fu Horng , Hsiao-Wen Zan , Hao-Wen Chang , Yu-Fan Chang , Yu-Chian Chiu
IPC分类号： H01L51/40
CPC分类号： H01L51/508 , H01L51/0003 , H01L51/0072 , H01L51/506 , H01L51/5076 , H01L51/56
摘要： A method for manufacturing an organic electronic component is provided. The method includes steps of providing a substrate and an organic material; coating the organic material onto the substrate; heating the substrate to form a first carrier transport layer; doping a material having a metal ion to an organic solvent to form an organic solution; and applying the organic solution onto the first carrier transport layer to form a second carrier transport layer.
摘要翻译：提供一种制造有机电子部件的方法。该方法包括提供基底和有机材料的步骤; 将有机材料涂覆到基材上; 加热衬底以形成第一载流子传输层; 将具有金属离子的材料掺杂到有机溶剂中以形成有机溶液; 以及将所述有机溶液施加到所述第一载流子传输层上以形成第二载流子传输层。

2. 发明申请

US20130107609A1 Static Random Access Memory Cell 有权
标题翻译：静态随机存取存储单元
公开(公告)号：US20130107609A1
公开(公告)日：2013-05-02
申请号：US13284532
申请日：2011-10-28
申请人： Meng-Fan Chang , Lai-Fu Chen , Jui-Jen Wu , Hiroyuki Yamauchi
发明人： Meng-Fan Chang , Lai-Fu Chen , Jui-Jen Wu , Hiroyuki Yamauchi
IPC分类号： G11C11/40
CPC分类号： G11C11/412
摘要： A static random access memory cell comprising a first inverter, a second inverter, a first transistor, a second transistor, and a third transistor. The first inverter is cross-coupled with the second inverter. The first transistor is connected with a write word line, a write bit line, and a first output node of the first inverter. The second transistor is connected with a complementary write bit line, the write word line, and a second output node of the second inverter. The third transistor is connected with a read bit line, a read word line, and the first input node of the first inverter to form a read port transistor, and a read port is formed. The read port transistor has a feature of asymmetric threshold voltage, and the read bit line swing can be expanded by the decrease of clamping current or the boosted read bit line.
摘要翻译：一种静态随机存取存储单元，包括第一反相器，第二反相器，第一晶体管，第二晶体管和第三晶体管。第一个反相器与第二个反相器交叉耦合。第一晶体管与第一反相器的写字线，写位线和第一输出节点连接。第二晶体管与第二反相器的互补写位线，写字线和第二输出节点连接。第三晶体管与读位线，读字线和第一反相器的第一输入节点连接，形成读端口晶体管，形成读端口。读端口晶体管具有不对称阈值电压的特征，并且可以通过钳位电流或升压读位线的减小来扩展读位线摆幅。

3. 发明授权

US08378716B2 Bulk-driven current-sense amplifier and operating method thereof 有权
标题翻译：体驱动电流检测放大器及其操作方法
公开(公告)号：US08378716B2
公开(公告)日：2013-02-19
申请号：US13178698
申请日：2011-07-08
申请人： Che-Wei Wu , Meng-Fan Chang , Ku-Feng Lin
发明人： Che-Wei Wu , Meng-Fan Chang , Ku-Feng Lin
IPC分类号： G01R19/00
CPC分类号： G11C7/06 , G11C7/062 , G11C13/0002 , G11C13/004 , G11C2013/0042 , G11C2013/0054
摘要： A bulk-driven current-sense amplifier and an amplifier operating method are disclosed. The bulk-driven current-sense amplifier includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver. The second drive is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver. When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first node and the second node. When the charging is completed, the first node and the second node respectively have a different stabilized potential according to currents separately flowing through a first memory unit of the first driver and a second memory unit of the second drive, and the differential amplifier generates a voltage.
摘要翻译：公开了体驱动电流检测放大器和放大器操作方法。体驱动电流检测放大器包括差分放大器，第一驱动器和第二驱动器。第一驱动器耦合到差分放大器，并且第一节点形成在第一驱动器的连接段处。第二驱动器耦合到差分放大器，并且第二节点形成在第二驱动器的连接段处。当第一驱动器的第一开关和第二驱动器的第二开关导通时，差分放大器对第一节点和第二节点充电。当充电完成时，第一节点和第二节点分别根据分别流过第一驱动器的第一存储器单元的电流和第二驱动器的第二存储器单元分别具有不同的稳定电位，并且差分放大器产生电压。

4. 发明授权

US08360269B1 Communication box 有权
标题翻译：通讯箱
公开(公告)号：US08360269B1
公开(公告)日：2013-01-29
申请号：US13179497
申请日：2011-07-09
申请人： Hsi-Fan Chang
发明人： Hsi-Fan Chang
IPC分类号： B65D51/04 , B65D45/16
CPC分类号： B65D45/20 , B65D43/0202 , B65D43/166 , B65D2543/00296
摘要： A communication box includes a box body and a box lid. The box body has an accommodation space therein. The box lid includes a lid body and two engaging members. Upper and lower ends of the two engaging members are detachably connected to the box body. The two engaging members are respectively and pivotally connected two opposing sides of the lid body, so that the two engaging members are rotatable relative to the lid body. Compared the conventional communication box, the communication box of the present invention can be opened in different ways. Through one of the two engaging members, either side of the box lid can be opened. Alternatively, the box lid can be detached from the box body through disengagement of the two engaging members. The present invention can be used in different occasions and is convenient for operation, without limitation of space.
摘要翻译：通讯箱包括箱体和箱盖。盒体在其中具有容纳空间。盒盖包括盖体和两个接合构件。两个接合构件的上端和下端可拆卸地连接到箱体。两个接合构件分别并且枢转地连接在盖体的两个相对侧上，使得两个接合构件相对于盖体可旋转。与常规通信盒相比，本发明的通信盒可以以不同的方式打开。通过两个接合构件中的一个，盒盖的任一侧可以打开。或者，盒盖可以通过两个接合构件的分离而与箱体分离。本发明可以在不同的场合使用，且操作方便，而不受空间的限制。

5. 发明申请

US20130005077A1 APPARATUS AND METHOD OF MANUFACTURING ORGANIC ELECTRONIC COMPONENT 审中-公开
标题翻译：装置和制造有机电子元件的方法
公开(公告)号：US20130005077A1
公开(公告)日：2013-01-03
申请号：US13281665
申请日：2011-10-26
申请人： Hsin-Fei Meng , Hsiao-Wen Zan , Sheng-Fu Horng , Hsiu-Yuan Yang , Kuo-Jui Huang , Hao-Wen Chang , Chun-Yu Chen , Yu-Chiang Chao , Yu-Fan Chang , Bo-Jie Chang
发明人： Hsin-Fei Meng , Hsiao-Wen Zan , Sheng-Fu Horng , Hsiu-Yuan Yang , Kuo-Jui Huang , Hao-Wen Chang , Chun-Yu Chen , Yu-Chiang Chao , Yu-Fan Chang , Bo-Jie Chang
IPC分类号： H01L51/40 , H05K13/00 , B05C9/14
CPC分类号： H01L51/0002 , B05D3/0254 , H01L51/0008 , H01L51/0026 , H01L51/0085 , H01L51/56 , Y02E10/549 , Y02P70/521 , Y10T29/49002
摘要： A chemical mechanical polishing method is provided. The chemical mechanical polishing method includes steps of providing a plurality of semiconductor elements to be polished, obtaining a respective dimension of the each semiconductor element to be polished, and polishing the each semiconductor element according to the respective dimension thereof.
摘要翻译：提供了化学机械抛光方法。化学机械抛光方法包括提供待研磨的多个半导体元件，获得待研磨的每个半导体元件的相应尺寸，并根据其各自的尺寸对每个半导体元件进行抛光的步骤。

6. 发明授权

US08331134B2 Non-volatile static random access memory and operation method thereof 有权
标题翻译：非易失性静态随机存取存储器及其操作方法
公开(公告)号：US08331134B2
公开(公告)日：2012-12-11
申请号：US12853301
申请日：2010-08-10
申请人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
发明人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
IPC分类号： G11C11/00
CPC分类号： G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C14/0054 , G11C14/009
摘要： A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.
摘要翻译：提供了包括锁存单元，第一开关，第二开关，第一非易失性存储器（NVM）和第二NVM的非易失性静态随机存取存储器（NV-SRAM）及其操作方法。第一和第二开关的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二开关的第二端子分别连接到第一和第二位线。第一和第二开关的控制端子连接到字线。第一和第二NVM的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二NVM的第二端子分别连接到第一和第二位线。第一和第二NVM的使能端子连接到使能线。

7. 发明授权

US08213213B2 Reference current generator for resistance type memory and method thereof 有权
标题翻译：电阻型存储器的参考电流发生器及其方法
公开(公告)号：US08213213B2
公开(公告)日：2012-07-03
申请号：US12614631
申请日：2009-11-09
申请人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
发明人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C5/147 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0038 , G11C13/004 , G11C2013/0054
摘要： A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets is formed with at least one first reference element and second reference elements connected in parallel. The number of the first reference elements plus the number of the second reference elements is N. The resistance value of first reference elements (a first resistance value) is not equal to the resistance value of the second reference elements (a second resistance value). An equivalent resistance provided with a equivalent resistance value between the first and second resistance value is formed by connecting the N parallel circuit sets in series between an input terminal and output terminal. A reference current is outputted from the output terminal by applying an operation voltage to the input terminal.
摘要翻译：公开了一种用于电阻型存储器的参考电流发生器及其方法。参考电流发生器包括N个并联电路组。 N个并联电路组中的每一个形成有并联连接的至少一个第一参考元件和第二参考元件。第一参考元件的数量加上第二参考元件的数量为N.第一参考元件（第一电阻值）的电阻值不等于第二参考元件的电阻值（第二电阻值）。通过在输入端子和输出端子之间串联连接N个并联电路组来形成具有第一和第二电阻值之间的等效电阻值的等效电阻。通过对输入端施加工作电压，从输出端子输出基准电流。

8. 发明申请

US20110309843A1 Discontinuous Type Layer-ID Detector For 3D-IC And Method of The Same 有权
标题翻译：用于3D-IC的不连续型层ID检测器及其方法
公开(公告)号：US20110309843A1
公开(公告)日：2011-12-22
申请号：US12820953
申请日：2010-06-22
申请人： Ming-Pin CHEN , Meng-Fan CHANG , Wei-Cheng WU
发明人： Ming-Pin CHEN , Meng-Fan CHANG , Wei-Cheng WU
IPC分类号： G01R31/02
CPC分类号： G11C5/02 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565
摘要： A 3D-IC detector for each layer of a stacked device with N layer, includes a dividing-two circuit coupled to a (N−1) signal; a first comparator is coupled to the dividing-two circuit, wherein an input A is coupled to an initial layer number signal, an input B of the first comparator is coupled to an output of the dividing-two circuit; a second comparator is coupled to the initial layer number by an input A of the second comparator, and a num is coupled to an input B of the second comparator; a first Add/sub circuit is coupled to the num via an input A of the first Add/sub circuit, and coupled to the first comparator via an input B of the first Add/sub circuit, to the second comparator via an input +/−signal of the first Add/sub circuit; and a second Add/sub circuit coupled to the first comparator via an input A of the second Add/sub circuit, to the num via an input B of the second Add/sub circuit.
摘要翻译：用于具有N层的堆叠装置的每层的3D-IC检测器包括耦合到（N-1）信号的分二电路; 第一比较器耦合到分二电路，其中输入A耦合到初始层号信号，第一比较器的输入B耦合到分二电路的输出; 第二比较器通过第二比较器的输入端A耦合到初始层号，并且num耦合到第二比较器的输入端B; 第一加法/次电路经由第一加法/次电路的输入端A耦合到num，并且经由第一加法/副电路的输入B耦合到第一比较器，经由输入+ - 第一个Add / sub电路的信号; 以及经由第二加法/子电路的输入A耦合到第一比较器的第二加法/子电路经由第二加法/次电路的输入B耦合到num。

9. 发明申请

US20110280073A1 NON-VOLATILE STATIC RANDOM ACCESS MEMORY AND OPERATION METHOD THEREOF 有权
标题翻译：非易失性静态随机访问存储器及其操作方法
公开(公告)号：US20110280073A1
公开(公告)日：2011-11-17
申请号：US12853301
申请日：2010-08-10
申请人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
发明人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
IPC分类号： G11C14/00
CPC分类号： G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C14/0054 , G11C14/009
摘要： A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.
摘要翻译：提供了包括锁存单元，第一开关，第二开关，第一非易失性存储器（NVM）和第二NVM的非易失性静态随机存取存储器（NV-SRAM）及其操作方法。第一和第二开关的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二开关的第二端子分别连接到第一和第二位线。第一和第二开关的控制端子连接到字线。第一和第二NVM的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二NVM的第二端子分别连接到第一和第二位线。第一和第二NVM的使能端子连接到使能线。

10. 发明申请

US20110128791A1 Method and Apparatus of Performing an Erase Operation on a Memory Integrated Circuit 有权
标题翻译：在存储器集成电路上执行擦除操作的方法和装置
公开(公告)号：US20110128791A1
公开(公告)日：2011-06-02
申请号：US12834686
申请日：2010-07-12
申请人： Yi-Fan Chang , Cheng Ming Yih , Su-chueh Lo , Jian Shing Liu , Kuen-Long Chang , Chun-Hsiung Hung
发明人： Yi-Fan Chang , Cheng Ming Yih , Su-chueh Lo , Jian Shing Liu , Kuen-Long Chang , Chun-Hsiung Hung
IPC分类号： G11C16/06 , G11C16/16
CPC分类号： G11C16/14 , G11C16/344 , G11C16/3477
摘要： Various discussed approaches include an improved grouping of edge word lines and center word lines of an erase group during erase verify and erase sub-operations of an erase operation. In another approach, changed voltage levels of edge word lines to address the over-erase issue of the erase group, and also improve erase time performance. Another approach uses dummy word lines.
摘要翻译：各种讨论的方法包括在擦除验证和擦除擦除操作的子操作期间改进擦除组的边缘字线和中心字线的分组。在另一种方法中，改变边缘字线的电压电平以解决擦除组的过擦除问题，并且还提高擦除时间性能。另一种方法使用虚拟字线。

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