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    • 1. 发明公开
    • 복조 회로 및 복조 방법
    • 解调电路和解调方法
    • KR1020070077019A
    • 2007-07-25
    • KR1020060051937
    • 2006-06-09
    • 후지쯔 세미컨덕터 가부시키가이샤
    • 기타다츠아키이와마츠다카노리
    • H04L27/38H04L27/22
    • H04L27/2067H04L7/0029H04L7/0054H04L2027/0032H04L2027/0057H04L2027/0067H04L2027/0079
    • A modulation circuit and a demodulation method are provided to enlarge a capturing range of a carrier reproduction loop or clock reproduction loop and shorten a capturing time. A modulation circuit includes a carrier reproduction loop, a phase error determination circuit, and a loop filter(103). The carrier reproduction loop controls to reduce a phase error of a carrier for tracking the carrier. The phase error determination circuit is included in the carrier reproduction loop, determines a phase of the carrier progresses or delays, and determines that the phase progresses when a progress or delay of the phase is not determined. The loop filter(103) is included in the carrier reproduction loop, integrates the result of the progress or delay determination, and shifts an integral maximum of a progress to the integral maximum of a delay.
    • 提供了一种调制电路和解调方法来扩大载波再现环路或时钟再现环路的捕获范围并缩短捕获时间。 调制电路包括载波再现环路,相位误差确定电路和环路滤波器(103)。 载波再现环路控制以减少用于跟踪载波的载波的相位误差。 相位误差确定电路被包括在载波再现环路中,确定载波进位或延迟的相位,并且当没有确定相位的进展或延迟时确定相位的进行。 环路滤波器(103)被包括在载波再现环路中,对进位或延迟确定的结果进行积分,并将进展的积分最大值移位到延迟的积分最大值。