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    • 2. 发明公开
    • 세라믹 기판의 제조방법 및 세라믹 기판
    • 生产陶瓷基材的方法和陶瓷基材
    • KR1020050026369A
    • 2005-03-15
    • KR1020040072126
    • 2004-09-09
    • 니혼도꾸슈도교 가부시키가이샤
    • 도사아키후미오츠카쥰사토마나부가시마히사히토
    • H01G4/12H01G4/005
    • B32B18/00C03C14/004C03C2214/20C04B2235/6567C04B2235/9615C04B2237/341C04B2237/343C04B2237/346C04B2237/56C04B2237/562C04B2237/565C04B2237/568C04B2237/66C04B2237/68C04B2237/702C04B2237/704H01G4/30H01L21/481H01L21/4857H05K1/0306H05K3/246H05K3/4611H05K3/4629H05K2201/0347H05K2201/09881H05K2203/308
    • A method for manufacturing ceramic substrates, and the ceramic substrates are provided to minimize firing strains on a surface conductor by preventing external pollutants from adhering to the surface conductor. A surface-mount-type laminated ceramic capacitor(40) is a laminate of ceramic dielectric layers(5) and wiring pattern layers(6), which are alternately arranged in layers. Each of the wiring pattern layers(6) includes the first capacitor electrode(6a) and the second capacitor electrode(6b), which face each other with the corresponding ceramic dielectric layer(5) sandwiched therebetween. The first via electrodes(8) are electrically connected to the first capacitor electrodes(6a) and are not electrically connected to the second capacitor electrodes(6b). The second via electrodes(8') are electrically connected to the second capacitor electrodes(6b) and are not electrically connected to the first capacitor electrodes(6a). Metal terminals(33) have a diameter greater than that of the via electrodes and include a surface conductor(32) and a plating layer(31). The surface conductors(32) are embedded in a ceramic dielectric layer(7b) whose surface serves as a main surface(CP) of the capacitor(40). A ceramic green sheet(21) to be used in forming the second base portion is prepared. Then, a plurality of ceramic green sheets(5) to be laminated thereon are prepared. A plurality of via holes(4) are formed in the ceramic green sheets(5) at identical positions. A via electrode paste fills the via holes(4) to form via electrodes(8).
    • 提供陶瓷基板的制造方法和陶瓷基板,以通过防止外部污染物附着在表面导体上而使表面导体上的烧成应变最小化。 表面安装型层叠陶瓷电容器(40)是层叠交替排列的陶瓷电介质层(5)和布线图案层(6)的叠层体。 布线图案层(6)中的每一个包括第一电容器电极(6a)和第二电容器电极(6b),它们彼此相对,并且相应的陶瓷介电层(5)夹在它们之间。 第一通孔电极(8)电连接到第一电容器电极(6a),并且不与第二电容器电极(6b)电连接。 第二通孔电极(8')电连接到第二电容器电极(6b),并且不与第一电容器电极(6a)电连接。 金属端子(33)的直径大于通孔电极的直径,并且包括表面导体(32)和镀层(31)。 表面导体(32)嵌入陶瓷电介质层(7b)中,其表面用作电容器(40)的主表面(CP)。 制备用于形成第二基底部分的陶瓷生片(21)。 然后,准备多个层压在其上的陶瓷生片(5)。 多个通孔(4)在相同的位置形成在陶瓷生片(5)中。 通孔电极浆料填充通孔(4)以形成通孔电极(8)。
    • 5. 发明公开
    • 다층 세라믹 기판의 제조 방법
    • 多层基板的制造方法
    • KR1020090066862A
    • 2009-06-24
    • KR1020070134580
    • 2007-12-20
    • 삼성전기주식회사
    • 박은태고민지
    • H05K3/46
    • H05K3/4611B32B18/00C04B2235/6025C04B2235/6562C04B2235/6567C04B2235/661C04B2237/32C04B2237/562C04B2237/62C04B2237/68C04B2237/702C04B2237/704H05K1/0306H05K1/092H05K3/1291H05K3/4629H05K2203/1126H05K2203/1476H05K2203/308
    • A method for manufacturing a multilayer ceramic substrate is provided to improve fixing intensity between a ceramic lamination and an external electrode in a second baking process by preventing crystallization of a glass component included in the ceramic lamination in a first baking process. A ceramic lamination manufacturing process is performed to manufacture a ceramic lamination including a glass component. A constraining layer is laminated on an upper part and a lower part of the ceramic lamination. A first baking process is performed within a first temperature range to prevent the crystallization of the glass component included in the ceramic lamination. The constraining layer is removed after the first baking process. An external electrode is formed on the ceramic lamination. A second baking process is performed to bake the ceramic lamination including the external electrode in a second temperature range. The second temperature range is higher than the first temperature range.
    • 提供一种制造多层陶瓷基板的方法,用于通过在第一烘烤工艺中防止包含在陶瓷层压件中的玻璃成分的结晶而在第二烘烤工艺中提高陶瓷层压板和外部电极之间的固定强度。 执行陶瓷层压制造工艺以制造包括玻璃组分的陶瓷层压体。 在陶瓷层压体的上部和下部层压约束层。 在第一温度范围内进行第一烘焙处理,以防止包含在陶瓷层压体中的玻璃成分的结晶。 在第一次烘烤过程之后去除约束层。 在陶瓷层压板上形成外部电极。 进行第二烘烤处理以在第二温度范围内烘烤包括外部电极的陶瓷层压体。 第二温度范围高于第一温度范围。