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    • 1. 发明公开
    • 위상오차 측정을 통한 디지탈 위상 고정 루프
    • 数字相位锁定环路测量相位误差
    • KR1020020032194A
    • 2002-05-03
    • KR1020000063214
    • 2000-10-26
    • 한국항공우주연구원
    • 권기호조창범채태병
    • H04L7/04
    • PURPOSE: A digital phase locked loop by a measurement of a phase error is disclosed to provide a reference time of an artificial satellite by compensating for an error and a noise of an IPPS signal from a GPS receiver. CONSTITUTION: The digital phase locked loop synchronizes a GPS 1PPS signal with a UTC. A phase error detector(21) calculates an error between a GPS 1PPS signal and internal 1Hz of a processor according to a reference signal. A software filter(22) reduces jitter amount of a compensated 1PPS signal which is provided to a DPLL based on the error calculated by the phase error detector(21) using a digital filter method. An error compensator(23) compensates for the 1PPS signal by the error compensated by the software filter(22) and provided the compensated IPPS signal to an input terminal of a DPLL.
    • 目的:公开了通过相位误差测量的数字锁相环,通过补偿来自GPS接收机的IPPS信号的误差和噪声来提供人造卫星的参考时间。 构成:数字锁相环将GPS 1PPS信号与UTC同步。 相位误差检测器(21)根据参考信号计算处理器的GPS 1PPS信号和内部1Hz之间的误差。 软件滤波器(22)基于使用数字滤波器方法由相位误差检测器(21)计算出的误差来减少提供给DPLL的经补偿的1PPS信号的抖动量。 误差补偿器(23)通过由软件滤波器(22)补偿的误差来补偿1PPS信号,并将补偿的IPPS信号提供给DPLL的输入端。
    • 2. 发明公开
    • 하드웨어 메모리 스크러버
    • 硬件记忆体
    • KR1020040050736A
    • 2004-06-17
    • KR1020020077882
    • 2002-12-09
    • 한국항공우주연구원
    • 조창범권기호채태병김대영강석주김영제심은섭
    • G06F13/00
    • PURPOSE: A hardware memory scrubber is provided to shorten scrub time and reduce load by performing the memory scrub with hardware in a memory system of a satellite. CONSTITUTION: A scrub control block(110) generates a scrub execution control signal for executing the scrub of a mass memory control FPGA(Field Programmable Gate Array)(200), a page generating signal for scrubbing each page of a memory, and an address needed for executing the scrub. A multiplexer block(120) transmits the address, the data, and the control signal of the scrub control block to the mass memory FPGA. The scrub control block comprises a control block generating the scrub control signal by checking the time for executing the scrub, an address generating block generating the address needed for the scrub, and a page generating block generating the control signal for selecting the scrub page of a mass memory.
    • 目的:提供硬件存储器擦除器,以通过使用卫星存储系统中的硬件执行内存擦除来缩短擦除时间并减少负载。 洗涤控制块(110)产生用于执行大容量存储器控制FPGA(现场可编程门阵列)(200)的擦洗的擦洗执行控制信号,用于擦除存储器的每一页的页面产生信号和地址 需要执行擦洗。 多路复用器块(120)将擦除控制块的地址,数据和控制信号发送到大容量存储器FPGA。 擦洗控制块包括通过检查执行擦洗的时间产生擦洗控制信号的控制块,产生擦洗所需的地址的地址生成块,以及生成控制信号的页生成块,用于选择擦除页的擦除页 大量记忆
    • 4. 发明公开
    • 적외선 센서 시험장치
    • 用于测试红外传感器的设备
    • KR1020010011661A
    • 2001-02-15
    • KR1019990031138
    • 1999-07-29
    • 한국항공우주연구원
    • 류장수천용식조창범
    • G01M99/00
    • PURPOSE: A testing apparatus of an infrared sensor is provided to speedily and precisely carry out the test of performance of conical earth sensors mounted on an artificial satellite at various angles by simply adjusting mounting positions of reaction plates. CONSTITUTION: A testing apparatus of an infrared sensor includes reaction plates(4,5) mounted in front of conical earth sensors(CES;2,3) mounted on an artificial satellite(1) and incorporating a hot wire for generating infrared rays, a power supply(6) for controlling voltage and current to be supplied to the hot wire of the reaction plates, and a computer(8) for controlling the power supply and feedback-checking temperatures of the reaction plates to generate infrared rays by the reaction plates similar to an earth model, wherein the computer and the power supply are connected to the reaction plates by a thermal vacuum interface(10).
    • 目的:提供红外传感器的测试装置,通过简单的调整反应板的安装位置,以各种角度快速准确地进行安装在人造卫星上的锥形地球传感器的性能测试。 构成:红外线传感器的测试装置包括安装在安装在人造卫星(1)上的锥形接地传感器(CES; 2,3)前面的反应板(4,5),并且包括用于产生红外线的热丝, 用于控制供应到反应板的热丝的电压和电流的电源(6);以及用于控制反应板的电源和反馈板的反馈温度以产生红外线的计算机(8) 类似于地球模型,其中计算机和电源通过热真空接口(10)连接到反应板。
    • 5. 发明公开
    • 코넥터의 정전기 방지 키트
    • 防止连接器静电的工具包
    • KR1020010011487A
    • 2001-02-15
    • KR1019990030880
    • 1999-07-28
    • 한국항공우주연구원
    • 천용식임성빈조창범
    • H01R13/703
    • PURPOSE: A kit for preventing static electricity of a connector is provided to firstly connect equipments with the connector of the kit to eliminate static electricity when mutually interfacing the equipments. CONSTITUTION: A socket-type connector(2) and a pin-type connector(3) are installed in both sides. Each socket of the socket-type connector(2) and each pin of the pin-type connector(3) are connected to each one side of resistances(a1-an)(b1-bn). Each another side of the resistances(a1-an)(b1-b1) is connected to a jack socket(4), and a jack is inserted in the jack socket(4) to be connected to a ground point.
    • 目的:提供一种防止连接器静电的工具,首先将设备与设备的连接器连接起来,以便在相互连接设备时消除静电。 构成:两侧均安装有插座式连接器(2)和针式连接器(3)。 插座式连接器(2)的每个插座和针式连接器(3)的每个插脚连接到电阻(a1-an)(b1-bn)的每一侧。 电阻(a1-a)(b1-b1)的另一侧连接到插座(4),并且插座插入插座(4)中以连接到接地点。
    • 8. 发明公开
    • 데이타억세스및시뮬레이터장치
    • 数据访问和模拟设备
    • KR1020000047156A
    • 2000-07-25
    • KR1019980063939
    • 1998-12-31
    • 한국항공우주연구원
    • 김대영조창범채태병천이진정창호
    • G06F9/455
    • PURPOSE: A data access and simulation device is provided to simulate the information by connecting to the bus of the system computer. CONSTITUTION: I/O data of a concept of a map which is accomplished in a software loaded in a system computer are stored by using a corresponding memory element, or read from the corresponding memory element. The present I/O situation of the memory element is transmitted to the monitor of the computer, so we can confirm the situation. The memory element uses a dual port memory and a FIFO memory, and stores or reads the I/O data from an interface controlling device for the system computer to the memory element. The interface controlling device confirms the I/O data stored in the memory element from the computer monitor or prepares new data.
    • 目的:提供数据访问和仿真设备,通过连接到系统计算机的总线来模拟信息。 构成:通过使用对应的存储器元件或从相应的存储元件读取来存储在系统计算机中加载的软件中完成的映射的概念的I / O数据。 存储元件的当前I / O情况被传送到计算机的监视器,所以我们可以确认情况。 存储器元件使用双端口存储器和FIFO存储器,并将I / O数据从用于系统计算机的接口控制设备存储或读取到存储器元件。 接口控制装置从计算机监视器确认存储在存储器元件中的I / O数据或准备新的数据。
    • 9. 发明公开
    • 3차원자이로시험장비
    • 三维GYRO测试设备
    • KR1020000045959A
    • 2000-07-25
    • KR1019980062609
    • 1998-12-30
    • 한국항공우주연구원
    • 이주진천용식최종연조창범
    • G01C19/00
    • PURPOSE: A three-dimensional gyro test equipment is provided to freely set a rotation speed and direction of a rotation plate mounted with a gyro by a controller and perform a test of performance of two or three gyros simultaneously, thereby reducing testing time. CONSTITUTION: A three-dimensional gyro test equipment includes a plate(10), a fixing plate(20) fixed on the plate with a predetermined distance via a fixing pole(12), a motor(30) fixed below the fixing plate, a rotation plate(50) of which a rotation shaft is fixed at a lower part of the fixing plate for rotating in response to a rotation of the motor, a rotation plate fixed on the rotation plate and having a slant surface to be mounted with a gyro, and a controller(60) mounted on the plate for controlling driving of the motor according to a rotation direction and speed as a preset direction and speed and transmitting gyro information, wherein the slant surface of the rotation plate has an angle of 45 degree.
    • 目的:提供三维陀螺仪测试设备,通过控制器自由设置安装有陀螺仪的旋转盘的旋转速度和方向,并同时执行两个或三个陀螺仪的性能测试,从而减少测试时间。 构成:三维陀螺仪测试设备包括板(10),固定板(20),固定板(20)通过固定杆(12)固定在板上预定距离,固定在固定板下方的电动机(30) 旋转板(50),其旋转轴固定在固定板的下部,用于响应于电动机的旋转而旋转;旋转板,其固定在旋转板上并具有倾斜表面以安装有陀螺仪 以及控制器(60),其安装在所述板上,用于根据作为预设方向和速度的旋转方向和速度控制所述马达的驱动,并且传送陀螺仪信息,其中所述旋转板的倾斜表面具有45度的角度。
    • 10. 发明授权
    • 하드웨어 메모리 스크러버
    • 하드웨어메모리스크러버
    • KR100465421B1
    • 2005-01-13
    • KR1020020077882
    • 2002-12-09
    • 한국항공우주연구원
    • 조창범권기호채태병김대영강석주김영제심은섭
    • G06F13/00
    • PURPOSE: A hardware memory scrubber is provided to shorten scrub time and reduce load by performing the memory scrub with hardware in a memory system of a satellite. CONSTITUTION: A scrub control block(110) generates a scrub execution control signal for executing the scrub of a mass memory control FPGA(Field Programmable Gate Array)(200), a page generating signal for scrubbing each page of a memory, and an address needed for executing the scrub. A multiplexer block(120) transmits the address, the data, and the control signal of the scrub control block to the mass memory FPGA. The scrub control block comprises a control block generating the scrub control signal by checking the time for executing the scrub, an address generating block generating the address needed for the scrub, and a page generating block generating the control signal for selecting the scrub page of a mass memory.
    • 目的:提供硬件内存擦除器,通过在卫星的存储器系统中用硬件执行内存擦洗来缩短擦洗时间并减少负载。 构成:擦洗控制块(110)产生用于执行大容量存储器控制FPGA(现场可编程门阵列)(200)的擦洗的擦洗执行控制信号,用于擦洗存储器的每页的页面产生信号,以及地址 需要执行擦洗。 多路复用器块(120)将擦洗控制块的地址,数据和控制信号传送到大容量存储器FPGA。 擦洗控制块包括通过检查执行擦洗的时间而产生擦洗控制信号的控制块,产生擦洗所需的地址的地址产生块和产生用于选择擦除的擦除页的控制信号的页面产生块 大众记忆。