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2. 发明公开

KR1020050018290A 비트 라인 감지 증폭기 失效
标题翻译：用于通过消除两个PMOS晶体管减少布局区域的双电池MRAM的位线感测放大器
公开(公告)号：KR1020050018290A
公开(公告)日：2005-02-23
申请号：KR1020030056721
申请日：2003-08-16
申请人： 학교법인고려중앙학원
发明人： 김수원 , 송상헌 , 홍승균 , 유혜승
IPC分类号： G11C7/06
CPC分类号： G11C7/12 , G11C7/065 , G11C7/08 , G11C7/18
摘要： PURPOSE: A bit line sense amplifier of a twin cell MRAM is provided to reduce the layout area by eliminating two PMOS transistors in the bit line sense amplifier. CONSTITUTION: A bit line sense amplifier of a twin cells(111-1, 111-2, 111-3, 111-4) MRAM(300) comprises a differential amplifier(311) consisting of a NMOS transistor(M14) connected between the first output terminal(OUT) and a common node(CM), a NMOS transistor(M16) connected between the second output terminal(OUTb) and the common node(CM), and a NMOS transistor(M16) connected between the common node(CM) and a ground voltage(VSS); the first switching circuit(M11) connected between the power supply voltage(VDD) and the first output terminal(OUT), for being switched according to the voltage of the second output terminal(OUTb); the second switching circuit(M12) connected between the power supply voltage(VDD) and the second output terminal(OUTb), for being switched according to the voltage of the first output terminal(OUT); an equalization transistor(M13) connected between the first output terminal(OUT) and the second output terminal(OUTb), for equalizing the voltage of each output terminals(OUT, OUTb) in response to an enable signal(SA_EN) having a logic low state. Wherein, each transistors(M11, M12) amplifies the voltage difference between the first output terminal(OUT) and the second output terminal(OUTb).
摘要翻译：目的：提供双单元MRAM的位线读出放大器，通过消除位线读出放大器中的两个PMOS晶体管来减少布局面积。构成：双电池（111-1,111-2,111-3,111-4）MRAM（300）的位线读出放大器包括差分放大器（311），该差分放大器（311）由连接在第一输出端子（OUT）和公共节点（CM），连接在第二输出端子（OUTb）和公共节点（CM）之间的NMOS晶体管（M16）和连接在公共节点 CM）和接地电压（VSS）; 连接在电源电压（VDD）和第一输出端子（OUT）之间的第一开关电路（M11），用于根据第二输出端子（OUTb）的电压进行切换; 连接在电源电压（VDD）和第二输出端子（OUTb）之间的第二开关电路（M12），用于根据第一输出端子（OUT）的电压进行切换; 连接在第一输出端子（OUT）和第二输出端子（OUTb）之间的均衡晶体管（M13），用于响应于具有逻辑低电平的使能信号（SA_EN）来均衡每个输出端子（OUT，OUTb）的电压州。其中，每个晶体管（M11，M12）放大第一输出端（OUT）和第二输出端（OUTb）之间的电压差。

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