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1. 发明公开

KR1020080059321A 반도체 장치 및 이를 포함하는 스마트 카드, 공격 방어방법 无效
标题翻译：用于防止半导体器件上的触发的半导体器件和方法
公开(公告)号：KR1020080059321A
公开(公告)日：2008-06-26
申请号：KR1020087012207
申请日：2006-10-16
申请人： 엔엑스피 비 브이
发明人： 가르베요아힘 , 오스테르툰소엔케
IPC分类号： G06F21/02 , G06F21/00 , G06F12/14
CPC分类号： G06F21/554 , G06F21/77 , G06F2221/2101 , G06F2221/2137
摘要： The invention relates to a method and to a semiconductor device, comprising means for detecting an unauthorized access to the semiconductor device, wherein the semiconductor device carries out an initialization of the semiconductor device following detection of an unauthorized access, wherein an information item relating to the unauthorized access can be stored by the semiconductor device prior to the initialization, and wherein the stored information item relating to the unauthorized access remains intact following the initialization of the semiconductor device. It is advantageously provided that the stored information item remains intact for a predetermined period of time following disconnection of the semiconductor device from a power supply.
摘要翻译：本发明涉及一种方法和半导体器件，包括用于检测对半导体器件的未经授权的访问的装置，其中半导体器件在检测到未经授权的访问之后执行半导体器件的初始化，其中与在初始化之前，半导体器件可以存储未经授权的访问，并且其中与半导体器件的初始化之后的与未授权访问有关的所存储的信息项保持不变。有利的是，在将半导体器件从电源断开之后的预定时间段内，存储的信息项保持完整。

2. 发明公开

KR1020090010109A 신호 전송 라인에 대한 공격을 검출하는 센서 无效
标题翻译：具有电路布置的传感器
公开(公告)号：KR1020090010109A
公开(公告)日：2009-01-28
申请号：KR1020087029984
申请日：2007-05-03
申请人： 엔엑스피 비 브이
发明人： 오스테르툰소엔케 , 가르베요아힘 , 토리야베요한네스
IPC分类号： G06K19/073
CPC分类号： G06K19/07363 , G06K19/07345
摘要： The invention relates to a sensor, in particular for detecting attacks on at least one signal-carrying line (11), in particular of chip cards (1), said sensor having a circuit arrangement (10) which comprises a first circuit arrangement (13) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated and can be taken as a basis for initiating a protective measure.
摘要翻译：本发明涉及一种传感器，特别是用于检测至少一条信号传输线路（11），特别是芯片卡（1）的攻击，所述传感器具有电路装置（10），该电路装置包括第一电路装置），用于检测高于第一电源电压的瞬时电压值;以及第二电路装置（14），用于检测低于第二电源电压的瞬时电压值，其中当检测到在第一和第二电源电压之间的范围之外的电压值时，产生信号（19），并且可以作为启动保护措施的基础。

3. 发明公开

KR1020080054412A 에러 검출/보정 회로 및 방법과, 전자 메모리 소자 또는메모리 모듈 无效
标题翻译：错误检测/校正电路及相关方法
公开(公告)号：KR1020080054412A
公开(公告)日：2008-06-17
申请号：KR1020087009987
申请日：2006-09-19
申请人： 엔엑스피 비 브이
发明人： 오스테르툰소엔케 , 가르베요아힘크리스토프한스
IPC分类号： G06F11/10
CPC分类号： G06F11/1008
摘要： In order to provide an error detection / correction circuit (100; 100') as well as a method for detecting and/or for correcting at least one error of at least one data word, said data word comprising-information in the form of at least one information bit or at least one pay load data bit, and-redundancy in the form of at least one check bit or at least one redundant bit, wherein the number of the one or more check bits or redundant bits being supplemented to the respective data word is optimized, in particular wherein at least one physical memory space can be used in an optimized way depending on the requirements of the application, it is proposed-to perform at least one first error correction scheme being assigned to at least one first data path (30; 30'), and-to perform at least one second error correction scheme--being assigned to at least one second data path (40; 40'), and--being designed for increasing the information and/or the redundancy, in particular---for increasing the number of the one or more information bits or of the one or more pay load data bits and/or---for increasing the number of the one or more check bits or of the one or more redundant bits, of the respective data word being transmitted through the second data path (40; 40').
摘要翻译：为了提供错误检测/校正电路（100; 100'）以及用于检测和/或校正至少一个数据字的至少一个错误的方法，所述数据字包括以下形式的信息：以至少一个信息位或至少一个有效负载数据位，以及至少一个校验位或至少一个冗余位形式的冗余，其中所述一个或多个校验位或冗余位的数量被补充到相应的数据字被优化，特别是其中至少一个物理存储器空间可以根据应用的要求以优化的方式使用，因此建议执行至少一个第一纠错方案被分配给至少一个第一数据路径（30; 30'），以及 - 执行至少一个第二错误校正方案 - 被分配给至少一个第二数据路径（40; 40'），并且被设计为增加信息和/或冗余，特别是---增加数字一个或多个信息位或一个或多个付费负载数据位和/或用于增加相应数据字中的一个或多个校验位或一个或多个冗余位的数量，通过第二数据路径（40; 40' ）。

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