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    • 2. 发明公开
    • 집적 회로 및 제조 방법
    • 集成电路设备及其制造方法
    • KR1020010051074A
    • 2001-06-25
    • KR1020000061009
    • 2000-10-17
    • 알카텔-루센트 유에스에이 인코포레이티드
    • 머찬트세일러쉬만신로이프레딥쿠마
    • H01L21/28
    • H01L21/76843H01L21/76864H01L21/76873H01L21/76877H01L23/53233H01L23/53238H01L2924/0002H01L2924/00
    • PURPOSE: An integrated circuit device is provided to uniform a copper microstructure which hardly deteriorates greatly during self annealing or the following processing steps. CONSTITUTION: The integrated circuit device includes a silicon substrate(12), a metallization layer(14) over a portion of the substrate(12), a dielectric layer(16) having trenches, vias, damascene or dual damascene structures therein, the trenches or other structures being filled with a copper diffusion barrier layer(18), a copper seed layer(20) and a bulk copper interconnect(22). Typical dielectric layers(16) include silicon dioxide, tantalum oxide, low k dielectrics as are known in the art and polymeric xerogels and aerogels. Typical barrier layers(18) may be formed from materials such as Ta, TaN, Ta/TaN, TaSiN, WN or WSiN by vapor deposition or other techniques known in the art. The barrier layer(18) is generally about 25 - 500 angstrom thick. The function of the barrier layer(18) is to prevent the detrimental migration of copper into the dielectric(16) and the silicon(12).
    • 目的:提供一种集成电路器件,以使在自退火或后续处理步骤中几乎不劣化的铜微结构均匀化。 构成:集成电路器件包括硅衬底(12),在衬底(12)的一部分上的金属化层(14),其中具有沟槽,通孔,镶嵌或双镶嵌结构的电介质层(16),沟槽 或填充有铜扩散阻挡层(18),铜籽晶层(20)和体铜互连(22)的其它结构。 典型的电介质层(16)包括本领域已知的二氧化​​硅,氧化钽,低k电介质和聚合干凝胶和气凝胶。 典型的阻挡层(18)可以由诸如Ta,TaN,Ta / TaN,TaSiN,WN或WSiN的材料通过气相沉积或本领域已知的其它技术形成。 阻挡层(18)通常为约25-500埃厚。 阻挡层(18)的功能是防止铜进入电介质(16)和硅(12)的有害迁移。