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1. 发明授权

KR101202430B1 이중 대역 Ｆ급 전력증폭기 有权
标题翻译：双频F类功率放大器
公开(公告)号：KR101202430B1
公开(公告)日：2012-11-16
申请号：KR1020110044368
申请日：2011-05-12
申请人： 세원텔레텍 주식회사 , 전북대학교산학협력단
发明人： 정용채 , 김철동
IPC分类号： H03F3/60 , H03F3/20
CPC分类号： H03F3/60 , H01P5/10 , H03F1/56 , H03F3/217
摘要： PURPOSE: A dual-band class-f power amplifier is provided to match a maximum output power matching point with a terminal load in two dual band operating frequencies of one transistor through a dual band matching circuit. CONSTITUTION: A dual band harmonic cut off load circuit(200) is connected to an output terminal of a class-F power amplifier(100). The dual band harmonic cut off load circuit matches a secondary harmonic and a third harmonic. A dual band matching circuit(300) is connected to the output terminal of the dual band harmonic cut off load circuit. The maximum output power matching point is matched to a terminal load in two operating frequencies. First and second single band harmonic cut off load circuits designed in the two operating frequencies are connected each other in the dual band harmonic cut off load circuit. The first single band harmonic cut off load circuit is connected to a first transmission line through an output side connection point of the first transmission line. A terminal of the first single band harmonic cut off load circuit comprises a second transmission line and a third transmission line that are open to each short circuit. [Reference numerals] (100) Power amplifier; (200) Dual band harmonic cut off load circuit; (300) Dual band matching circuit
摘要翻译：目的：提供双频F类功率放大器，以通过双频带匹配电路将最大输出功率匹配点与一个晶体管的两个双频带工作频率中的终端负载相匹配。构成：双频带谐波截止负载电路（200）连接到F类功率放大器（100）的输出端子。双频谐波切断负载电路匹配二次谐波和三次谐波。双频带谐波切断负载电路的输出端连接双频带匹配电路（300）。最大输出功率匹配点与两个工作频率中的终端负载相匹配。在双频谐波切断负载电路中，在两个工作频率中设计的第一和第二单频谐波截止负载电路相互连接。第一单频谐波切断负载电路通过第一传输线的输出侧连接点连接到第一传输线。第一单频带谐波切断负载电路的端子包括对每个短路开放的第二传输线和第三传输线。（附图标记）（100）功率放大器; （200）双频谐波切断负载电路; （300）双频段匹配电路

2. 发明公开

KR1020120037250A 음의 군지연 회로를 갖는 피드포워드 선형 전력 증폭기 无效
标题翻译：带负极组延迟电路的前级线性功率放大器
公开(公告)号：KR1020120037250A
公开(公告)日：2012-04-19
申请号：KR1020100098891
申请日：2010-10-11
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 정용채
IPC分类号： H03F1/32
CPC分类号： H03F1/3229 , H03F2200/198
摘要： PURPOSE: A feedforward linear power amplifier with a negative group delay circuit is provided to obtain a negative group delay time response in broadband by forming a negative group delay circuit using a transmission line resonator. CONSTITUTION: A gain phase adjuster(100) adjusts the amplitude and phase of a signal flowing to a main power amplifier path. A main power amplifier(200) power-amplifies the signal adjusted through the gain phase adjuster. A negative group delay circuit(300) is placed on a common path for group delay matching between an output signal of the main power amplifier and a reference path signal. A combiner(400) outputs only an intermodulation distortion signal to the other gain phase adjuster(500) by eliminating a main signal. The gain phase adjuster adjusts the gain and phase of the intermodulation distortion signal outputted from the combiner. An error amplifier(600) amplifies the intermodulation distortion signal.
摘要翻译：目的：提供具有负组延迟电路的前馈线性功率放大器，通过使用传输线谐振器形成负组延迟电路，以获得宽带中的负组延迟时间响应。构成：增益相位调节器（100）调节流向主功率放大器路径的信号的幅度和相位。主功率放大器（200）对通过增益相位调节器调节的信号进行功率放大。负组群延迟电路（300）被放置在用于主功率放大器的输出信号和参考路径信号之间的组延迟匹配的公共路径上。组合器（400）通过消除主信号仅将互调失真信号输出到另一增益相位调节器（500）。增益相位调节器调节从组合器输出的互调失真信号的增益和相位。误差放大器（600）放大互调失真信号。

3. 发明授权

KR101093644B1 음의 군지연 회로를 갖는 아날로그 피드백 선형 전력 증폭기 有权
标题翻译：模拟反馈线性功率放大器使用负数组延迟电路
公开(公告)号：KR101093644B1
公开(公告)日：2011-12-15
申请号：KR1020100068622
申请日：2010-07-15
申请人： 세원텔레텍 주식회사 , 전북대학교산학협력단
发明人： 정용채 , 김철동 , 이기형
IPC分类号： H03F1/32 , H03H11/26
CPC分类号： H03F1/3229 , H03F3/602 , H03F2201/3227
摘要： PURPOSE: An analog feedback linear power amplifier with a NGDC(Negative Group Delay Circuit) is provided to increase a improved linearity bandwidth by designing a negative group delay circuit into a dispersive element type. CONSTITUTION: A main power amplifier(MPA) amplifies a signal, which is applied passing through an input combiner(11), as much as the gain of an amplifier. A band pass filter(BPF) prevents the oscillation of a signal which is extracted from the output signal extraction combiner(13) connected to the output terminal of the main power amplifier. A main signal eliminating circuit outputs an error signal by comparing the reference signal of an input signal which is applied passing through the input combiner and output signal amplified passing through the band pass filter. An error power amplifier(EPA) attenuates an error signal which is outputted in the main signal eliminating circuit. A second vector modulator(VM2) controls the amplitude and the phase of an attenuated signal in the EPA.
摘要翻译：目的：提供具有NGDC（负组延迟电路）的模拟反馈线性功率放大器，以通过将负组延迟电路设计为分散元件类型来提高线性带宽。构成：主功率放大器（MPA）放大通过输入组合器（11）施加的信号与放大器的增益一样多的信号。带通滤波器（BPF）阻止从连接到主功率放大器的输出端的输出信号提取组合器（13）提取的信号的振荡。主信号消除电路通过比较通过输入组合器的输入信号的参考信号和通过带通滤波器放大的输出信号来输出误差信号。误差功率放大器（EPA）衰减在主信号消除电路中输出的误差信号。第二矢量调制器（VM2）控制EPA中衰减信号的振幅和相位。

4. 发明授权

KR100745039B1 2,3,4차 주파수 체배기 및 그 설계방법 失效
标题翻译： 2,3,4장주파수체배기및그설방법
公开(公告)号：KR100745039B1
公开(公告)日：2007-08-01
申请号：KR1020060044712
申请日：2006-05-18
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 김홍기 , 정용채
IPC分类号： H01P1/213 , H03K23/00
摘要： A second, third, and fourth order frequency multiplier and a method for designing the same are provided to prevent reduction of a multiplying signal level by removing a basic frequency component and a harmonic signal component except for a multiplying harmonic component among second harmonic signal components or more. A second, third, and fourth order frequency multiplier includes a feedforward second, third, and fourth order frequency multiplier and a DGS(Defected Ground Structure) transmission line. The feedforward second, third, and fourth order frequency multiplier has a feedforward, an input matching section, a multiplier, and an output matching section. The feedforward divides an input signal into a main passage and a sub passage to remove a basic frequency signal of the input signal by controlling the amplitude and a phase of a signal with a variable phase converter and a variable attenuator on the sub passage and a coupling coefficient of a coupler on the front or the rear of the multiplier. The input matching section matches to maximally input the basic frequency signal of the input signal divided into the main passage to the multiplier. The multiplier multipliers the matched signal on the input matching section. The output matching section matches to maximally output the signal multiplied on the multiplier at a corresponding doubling frequency. The DGS transmission line outputs each of only second, third, and fourth order multiplying signals by removing harmonics except for a multiplying harmonic component among second harmonic signal components or more.
摘要翻译：提供第二，第三和第四级倍频器及其设计方法，以通过去除除二次谐波信号分量中的乘法谐波分量之外的基本频率分量和谐波信号分量来防止乘法信号电平的降低，或者更多。第二，第三和第四级倍频器包括前馈二阶，三阶和四阶倍频器和DGS（缺陷接地结构）传输线。前馈二阶，三阶和四阶倍频器具有前馈，输入匹配部分，乘法器和输出匹配部分。前馈通过在子通道上使用可变相位转换器和可变衰减器来控制信号的振幅和相位，从而将输入信号分成主通道和副通道以去除输入信号的基本频率信号，乘法器正面或背面的耦合器系数。输入匹配部分匹配以最大程度地将划分成主通道的输入信号的基本频率信号输入到乘法器。乘法器将输入匹配部分上的匹配信号进行乘法运算。输出匹配部分匹配以最大程度地输出乘以相应倍频的倍增器的信号。除了二次谐波信号分量中的乘法谐波分量或更多以外，DGS传输线通过去除谐波来仅输出第二，第三和第四阶乘法信号中的每一个。

5. 发明公开

KR1020060064284A 동일 군속도 지연 신호상쇄기 및 이를 적용한 광대역피드포워드 전력증폭기 失效
标题翻译：平均组延迟信号消除器和超宽带带前置放大器
公开(公告)号：KR1020060064284A
公开(公告)日：2006-06-13
申请号：KR1020040103080
申请日：2004-12-08
申请人： 세원텔레텍 주식회사
发明人： 정용채 , 김철동 , 김홍기 , 장익수 , 안달
IPC分类号： H03F1/32
CPC分类号： H03F1/3229 , H03F2200/132 , H03F2200/192
摘要： 본 발명은 피드포워드 전력증폭기에 관한 것으로서, 종전의 신호상쇄기가 동작 주파수 전 대역에서 위상과 군속도 지연 정합을 동시에 만족시킬 수 없었던 문제점을 해결하여 위상과 군속도 지연 정합을 동시에 만족시킴으로써, 인가되는 두 입력 단자의 신호들을 동일 군속도를 가지면서 광대역 신호 상쇄를 가능하게 하는 새로운 구조의 동일 군속도 지연 신호상쇄기 및 이를 적용한 광대역 피드포워드 전력증폭기를 제공한다.
전력증폭기, 피드포워드, 신호상쇄기, 군속도지연

6. 发明公开

KR1020020041950A 피드포워드 방식 선형 전력증폭기의 불요파 대역 신호제거 장치 无效
标题翻译：馈线式线性放大器的无源频带信号消除器
公开(公告)号：KR1020020041950A
公开(公告)日：2002-06-05
申请号：KR1020000071622
申请日：2000-11-29
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 정용채
IPC分类号： H03F1/32
摘要： PURPOSE: An unwanted frequency band signal eliminator of a feedward type linear power amplifier is provided to amplify a transmission band signal and eliminate a cross modulation distortion signal and an unwanted frequency band signal. CONSTITUTION: A distributor(122) again distributes an input on a main path which is amplified, a phase-converted, and divided. An attenuator(131) attenuates any one part of the distributed signal from the distributor(122). An unwanted band signal filter(132) extracts an unwanted frequency band signal from the signal attenuated by the attenuator(131). Variable attenuator and phase shifter(133,134) variable-attenuates and phase-shifts the extracted unwanted frequency band signal from the unwanted band signal filter(132). An error amplifier(135) corrects and amplifies the attenuated and phase-shifted extracted unwanted frequency band signal from the variable attenuator and phase shifter(133,134). A combiner(136) again combines a combined signal with the corrected and amplified signal from the error amplifier(135) in order to eliminate an unwanted frequency band signal from an input signal.
摘要翻译：目的：提供馈送型线性功率放大器的不需要的频带信号消除器来放大传输频带信号并消除交叉调制失真信号和不期望的频带信号。构成：分配器（122）再次分配放大，相位转换和分频的主路径上的输入。衰减器（131）衰减来自分配器（122）的分布信号的任何一部分。不需要的频带信号滤波器（132）从衰减器（131）衰减的信号中提取不需要的频带信号。可变衰减器和移相器（133,134）对来自不想要的频带信号滤波器（132）的抽取的不需要的频带信号进行可变衰减和相移。误差放大器（135）对来自可变衰减器和移相器（133,134）的衰减和相移提取的不想要的频带信号进行校正和放大。组合器（136）再次将组合信号与来自误差放大器（135）的经校正和放大的信号组合，以便从输入信号中消除不期望的频带信号。

7. 发明授权

KR101071844B1 전송선로 공진기를 이용한 반사형 음의 군지연 회로 失效
标题翻译：传输线谐振器负载组延迟电路
公开(公告)号：KR101071844B1
公开(公告)日：2011-10-10
申请号：KR1020090016434
申请日：2009-02-26
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 정용채
IPC分类号： H03F3/60 , H01P7/08 , H01P3/08
摘要： 이를위해본 발명에서는입력된신호를분기하는 90° 하이브리드와; 90° 하이브리드의결합단및 전송단에연결되어음의군지연시간을조정하는시간조정부와; 90° 하이브리드의결합단및 전송단에연결된전송선로를포함한전송선로공진기를이용한반사형음의군지연회로를제공한다.

8. 发明公开

KR1020100097480A 전송선로 공진기를 이용한 반사형 음의 군지연 회로 失效
标题翻译：传输线谐振器负载组延迟电路
公开(公告)号：KR1020100097480A
公开(公告)日：2010-09-03
申请号：KR1020090016434
申请日：2009-02-26
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 정용채
IPC分类号： H03F3/60 , H01P7/08 , H01P3/08
CPC分类号： H03F3/602 , H03F2200/192 , H03F2200/399 , H03F2200/543 , H03G1/0023
摘要： PURPOSE: A reflective negative group delay circuit using a transmission line resonator is provided to obtain a broadband negative group response by connecting negative group delay circuits with negative group delay time at different frequencies. CONSTITUTION: A 90 degrees hybrid(100) outputs a branched signal by branching an input signal. A time control unit(210,220) is connected to the combination terminal and the transmission terminal of the 90 degrees hybrid for controlling the negative group delay time. A transmission line(310,320) is connected to the combination terminal and the transmission terminal of the 90 degrees hybrid. A gain amplifier is serially connected to the 90 degrees hybrid and compensates the insertion loss. The time control unit is comprised of resistors.
摘要翻译：目的：提供使用传输线谐振器的反射负组延迟电路，通过连接不同频率的负组延迟时间的负组延迟电路来获得宽带负组响应。构成：90度混合（100）通过分支输入信号输出分支信号。时间控制单元（210,220）连接到组合终端和90度混合的发送终端，用于控制负组延迟时间。传输线（310,320）连接到组合终端和90度混合的传输终端。增益放大器串联连接到90度混合，并补偿插入损耗。时间控制单元由电阻组成。

9. 发明公开

KR1020080096374A Ｈｉｇｈ―Ｑ 인덕터 구조 无效
标题翻译：高Q电感结构
公开(公告)号：KR1020080096374A
公开(公告)日：2008-10-30
申请号：KR1020080027368
申请日：2008-03-25
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 김홍기 , 정용채
IPC分类号： H01F27/00
摘要： An inductor structure is provided to generate high quality factor and inductance at a high frequency using an active inductor structure of gyrator structure and a spiral inductor. A high-Q Inductor structure includes a feedback device which is inserted between a source part of transistor(M2) and a gate part of transistor(M1) in order to comprise a series-resonant circuit equivalent with a parasitic capacitance generated from the gate source part of both transistors(M1,M2). An active inductor which has a gyrator structure is composed of the transistors.
摘要翻译：提供电感器结构，以使用旋转器结构的有源电感结构和螺旋电感器在高频下产生高品质因子和电感。高Q电感结构包括插入在晶体管（M2）的源极部分和晶体管（M1）的栅极部分之间的反馈装置，以便包括等效于从栅极源产生的寄生电容的串联谐振电路两个晶体管（M1，M2）的一部分。具有回转器结构的有源电感器由晶体管组成。

10. 发明公开

KR1020070055990A 공진 회로를 이용한 마이크로파 군지연 시간조정기 无效
标题翻译： MICROWAVE GROUP延迟时间调节器使用谐振电路
公开(公告)号：KR1020070055990A
公开(公告)日：2007-05-31
申请号：KR1020060133720
申请日：2006-12-26
申请人： 세원텔레텍 주식회사
发明人： 김철동 , 김홍기 , 정용채
IPC分类号： H04B1/10 , H04B7/005
CPC分类号： H04B1/40 , H04B17/0085
摘要： 본 발명은 공진 회로를 이용한 마이크로파 군지연 시간조정기에 대한 것으로, 신호전송선로에 연결되며 바이어스 전압에 따라 캐패시터값이 변화하는 가변 캐패시터부(110)와; 상기 가변 캐패시터부(110)와 병렬 연결되며, 리액턴스가 양의 값을 가진 범위 내에서 캐패시터값을 변화시키는 가변 인덕터부(120)를 포함하여 이루어지는 단일 군지연 시간조정기(100)를 통하여 우수한 전기적 신호 전달 특성을 가지는 마이크로파 송수신 시스템을 제공한다.
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