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1. 发明公开

KR1020090041989A 디스플레이 드라이버에 구비되는 버퍼 증폭기 및 그 버퍼증폭기를 이용한 구동 전압의 생성 방법 无效
标题翻译：缓冲放大器及使用缓冲放大器产生驱动电压的方法
公开(公告)号：KR1020090041989A
公开(公告)日：2009-04-29
申请号：KR1020070107818
申请日：2007-10-25
申请人： 삼성전자주식회사
发明人： 김형태 , 차수익 , 박천욱
IPC分类号： G09G3/20 , G09G3/36 , H03F3/45 , H03K19/0175
CPC分类号： G09G3/2011 , G09G3/006 , G09G3/20 , G09G2310/027 , G09G2310/0291 , G09G2320/0233
摘要： A buffer-amplifier and a method of generating the driving voltage by using the buffer-amplifier are provided to decrease the dissemination range of the deviations to 1/2 by unifying the polarity of the deviations. The test gradation voltage is inputted to the first input terminal and the second input terminal of the buffer. The logic level of the test driving voltage outputted from the output terminal of buffer is latched. If the logic level of the test driving voltage is the high level, the buffer is set up as the first type. If the logic level of the test driving voltage is the low level, the buffer is set up as the second type. The driving voltage corresponding to the gradation voltage is generated by the operation of buffer.
摘要翻译：提供缓冲放大器和通过使用缓冲放大器产生驱动电压的方法，通过统一偏差的极性来将偏差的传播范围减小到1/2。测试灰度电压被输入到缓冲器的第一输入端和第二输入端。从缓冲器的输出端子输出的测试驱动电压的逻辑电平被锁存。如果测试驱动电压的逻辑电平为高电平，则将缓冲器设置为第一类。如果测试驱动电压的逻辑电平为低电平，则将缓冲器设置为第二类型。通过缓冲器的操作产生与灰度电压对应的驱动电压。

2. 发明公开

KR1020130031561A 표시 장치 및 그것의 오프셋 제거 방법 审中-实审
标题翻译：显示设备及其取消方法
公开(公告)号：KR1020130031561A
公开(公告)日：2013-03-29
申请号：KR1020110095211
申请日：2011-09-21
申请人： 삼성전자주식회사
发明人： 김형태 , 안정아 , 김지훈 , 박천욱
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/36 , G09G3/3688 , G09G2300/0871 , G09G2310/0291 , G09G2320/0204 , H03F2200/375
摘要： PURPOSE: A display device and an offset canceling method are provided to efficiently cancel an offset by a chopping operation after coinciding offset directions. CONSTITUTION: Offset directions of amplifiers coincide(S110). The offsets of the amplifiers are canceled by a chopping operation(S120). 0V is inputted to a first terminal and a second terminal of the amplifier, respectively. Data corresponding to each output terminal of the amplifiers is latched. Each type of the amplifiers is set by determining the first terminal and the second terminal to a positive input terminal and a negative input terminal.
摘要翻译：目的：提供显示装置和偏移消除方法，以便在偏移方向一致之后通过斩波操作有效地消除偏移。构成：放大器的偏移方向一致（S110）。通过斩波操作来消除放大器的偏移（S120）。 0V分别输入到放大器的第一端子和第二端子。对应于放大器的每个输出端子的数据被锁存。通过将第一端子和第二端子确定到正输入端子和负输入端子来设置每种类型的放大器。

3. 发明公开

KR1020100011285A 프리 디코더를 구비하는 디스플레이 구동회로 및 그구동방법 无效
标题翻译：显示驱动器集成电路，包括预解码器及其操作方法
公开(公告)号：KR1020100011285A
公开(公告)日：2010-02-03
申请号：KR1020080072431
申请日：2008-07-24
申请人： 삼성전자주식회사
发明人： 이우녕 , 최창휘 , 박천욱
IPC分类号： G09G3/36 , G09G3/20 , G02F1/133
CPC分类号： G09G3/3688 , G09G3/2011
摘要： PURPOSE: A display driving circuit including a pre-decoder and a driving method thereof are provided to control a slew rate of outputted gradation data by performing a pre-decoding operation. CONSTITUTION: A gradation voltage generator(140) receives at least one gamma reference voltage and generates a plurality of gradation voltages. A main decoder(122) receives the gradation voltage and the data from the outside and selectively outputs the gradation voltage. A pre-decoder(121) outputs the pre-charge voltage by decoding a part of data. An output buffer(130) outputs the gradation data for driving the display device. The pre-decoder receives and buffers a part of the gradation voltages. A switch unit(123) supplies the output of the pre-decoder and the main decoder to the output buffer.
摘要翻译：目的：提供一种包括预解码器及其驱动方法的显示驱动电路，以通过执行预解码操作来控制输出灰度数据的转换速率。构成：灰度电压发生器（140）接收至少一个伽马参考电压并产生多个灰度电压。主解码器（122）从外部接收灰度电压和数据，并选择性地输出灰度电压。预解码器（121）通过解码部分数据来输出预充电电压。输出缓冲器（130）输出用于驱动显示装置的灰度数据。预解码器接收并缓冲一部分灰度电压。开关单元（123）将预解码器和主解码器的输出提供给输出缓冲器。

4. 发明授权

KR100800491B1 업 슬루 레이트와 다운 슬루 레이트의 매칭을 위한 출력버퍼 및 이를 포함하는 소스 드라이버 失效
标题翻译：用于匹配上升速率和下降速率的输出缓冲器及其驱动器
公开(公告)号：KR100800491B1
公开(公告)日：2008-02-04
申请号：KR1020070008655
申请日：2007-01-27
申请人： 삼성전자주식회사
发明人： 김형태 , 강창식 , 박천욱
IPC分类号： G09G3/36 , G09G3/20 , H03F3/45 , H03K19/0175
CPC分类号： H03F3/45192 , H03F1/083 , H03F3/3022 , H03F2203/30015 , H03F2203/45091 , H03F2203/45248 , H03F2203/45626
摘要： An output buffer for matching up and down slew rates and a source driver including the same are provided to improve image quality by implementing a compensation unit for the characteristic of transistors of the source driver. An output buffer includes a differential input circuit(510), a current add circuit(520), an output circuit(540), and a slew rate matching circuit(550). The differential input circuit converts differential voltage signals, which are inputted through positive and negative input terminals, into differential current signals. The current add circuit receives the differential current signals and generates bias currents. The output circuit amplifies the differential voltage signals in response to the bias currents and outputs the amplified differential voltage signals. The slew rate matching circuit compensates for parasite capacitance around PMOS(Positive channel Metal Oxide Semiconductor) transistors.
摘要翻译：提供用于匹配上下摆幅率的输出缓冲器和包括其的源极驱动器，以通过为源极驱动器的晶体管的特性实现补偿单元来提高图像质量。输出缓冲器包括差分输入电路（510），电流加法电路（520），输出电路（540）和转换速率匹配电路（550）。差分输入电路将通过正和负输入端子输入的差分电压信号转换为差分电流信号。电流加法电路接收差分电流信号并产生偏置电流。输出电路根据偏置电流放大差分电压信号，并输出放大的差分电压信号。转换速率匹配电路补偿PMOS（正通道金属氧化物半导体）晶体管周围的寄生电容。

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