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    • 2. 发明公开
    • 절연 게이트형 반도체 장치
    • 绝缘栅型半导体器件
    • KR1020070109907A
    • 2007-11-15
    • KR1020070045384
    • 2007-05-10
    • 산요덴키가부시키가이샤
    • 이시다히로야스노구찌야스나리
    • H01L29/78
    • H01L29/7811H01L27/088H01L29/0619H01L29/0696H01L29/1095H01L29/42372H01L29/7395H01L29/7397H01L29/7813
    • An insulated gate type semiconductor device is provided to form a MOSFET for securing a high reverse breakdown voltage between a drain and a source without reducing an area of an operational region. A plurality of gate electrodes(13) are formed on a first general conductive type semiconductor substrate(1) and are arranged in a first stripe pattern. A plurality of second general conductive type channel regions(4) are formed on the semiconductor substrate and are arranged in a second stripe pattern. The first and second stripe patterns are oriented in a first direction. A first insulating layer is formed between the channel regions and the gate electrodes. A plurality of first general conductive type source regions(15) are formed in corresponding channel regions and are arranged in a third stripe pattern oriented in the first direction. A second insulating layer is disposed on the gate electrodes. A gate pad electrode(18) is disposed on the second insulating layer in order to cover a part of the channel regions.
    • 提供绝缘栅型半导体器件以形成用于在漏极和源极之间确保高反向击穿电压而不减小工作区域的面积的MOSFET。 在第一通用导电型半导体衬底(1)上形成多个栅电极(13)并且以第一条纹图形排列。 多个第二通用导电型沟道区(4)形成在半导体衬底上并且以第二条纹图形排列。 第一和第二条纹图案沿第一方向定向。 在沟道区和栅电极之间形成第一绝缘层。 多个第一通用导电型源极区域(15)形成在相应的沟道区域中,并且以沿第一方向取向的第三条纹图形排列。 第二绝缘层设置在栅电极上。 栅极电极(18)设置在第二绝缘层上以覆盖沟道区域的一部分。