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1. 发明授权

KR100393472B1 스캔테스트용자동리세트바이패스제어 失效
公开(公告)号：KR100393472B1
公开(公告)日：2003-10-17
申请号：KR1019960703736
申请日：1995-11-09
申请人： 내셔널 세미콘덕터 코포레이션
发明人： 부이,쿠옹,민
IPC分类号： G06F11/267
CPC分类号： G01R31/318541 , G01R31/318558
摘要： A self-resetting bypass control circuit is disclosed for use with scan testing of integrated circuits. The bypass control circuit includes a shift register and an OR gate. A test-enable signal is input to the shift register and to the OR gate, and the output of the shift register is also input to the OR gate. The output of the OR gate is a bypass signal that goes logic high immediately when the test enable signal goes logic high, that stays logic high while the test enable signal goes logic low momentarily, and that resets to logic low when the test enable signal goes logic low for an extended period of time.
摘要翻译：公开了一种用于集成电路的扫描测试的自复位旁路控制电路。旁路控制电路包括移位寄存器和或门。测试使能信号被输入到移位寄存器和或门，并且移位寄存器的输出也被输入到或门。或门的输出是一个旁路信号，当测试使能信号变为逻辑高电平时立即变为逻辑高电平，当测试使能信号暂时变为逻辑低电平时保持逻辑高电平，并在测试使能信号变为逻辑低电平时复位为逻辑低电平逻辑低一段时间。

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