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    • 75. 发明公开
    • 화학기상증착 챔버의 세정 방법
    • 化学气相沉积室清洗方法
    • KR1020040008873A
    • 2004-01-31
    • KR1020020042598
    • 2002-07-19
    • 삼성전자주식회사
    • 문광진최길현강상범박희숙
    • H01L21/304
    • C23C16/4405
    • PURPOSE: A cleaning method of a CVD(Chemical Vapor Deposition) chamber is provided to be capable of improving cleaning efficiency and restraining by-product from being generated at the inner portion of the chamber. CONSTITUTION: A substrate is loaded at the inner portion of a chamber(S50). A titanium layer is deposited at the upper portion of the substrate(S52). The substrate is unloaded from the chamber(S54). The first plasma process is carried out at the inner portion of the chamber by using the first gas containing N and H(S56). A cleaning process is carried out at the inner portion of the chamber by in-situ(S58). The second plasma process is carried out at the inner portion of the chamber by using the second gas containing N and H(S60).
    • 目的:提供CVD(化学气相沉积)室的清洁方法,以能够提高清洁效率并抑制在室内部产生副产物。 构成:将衬底装载在室的内部(S50)。 在基板的上部沉积有钛层(S52)。 从室中卸载基板(S54)。 通过使用含有N和H的第一气体(S56),在室的内部进行第一等离子体处理。 通过原位在室的内部进行清洁处理(S58)。 通过使用含有N和H的第二气体,在室的内部进行第二等离子体处理(S60)。
    • 76. 发明公开
    • 접착층을 이용한 반도체 소자의 배선 형성 방법
    • 通过使用粘合层形成半导体器件金属化的方法
    • KR1020040001272A
    • 2004-01-07
    • KR1020020036412
    • 2002-06-27
    • 삼성전자주식회사
    • 문광진최길현강상범박희숙양승길
    • H01L21/28
    • PURPOSE: A method of forming metallization of a semiconductor device is provided to improve uniformity of an adhesive layer used in metallization of bit line. CONSTITUTION: An interinsulation layer pattern(102) that defines contact holes is formed on a semiconductor substrate(100). A conductive material(110) is filled into the contact holes to form contact plugs and the surface of the interinsulation layer pattern is treated by gaseous plasma(120). An adhesive layer is formed over the contact plugs and the interinsulation layer pattern. A metallization layer is formed on the adhesive layer. The interinsulation layer pattern(102) is composed of USG(Undoped Silicate Glass) or BPSG(Borophosphosilicate Glass).
    • 目的:提供一种形成半导体器件的金属化的方法,以改善在位线的金属化中使用的粘合剂层的均匀性。 构成:在半导体衬底(100)上形成限定接触孔的绝缘层图案(102)。 将导电材料(110)填充到接触孔中以形成接触塞,并且通过气体等离子体(120)处理绝缘层图案的表面。 在接触塞和绝缘层图案之上形成粘合剂层。 在粘合剂层上形成金属化层。 绝缘层图案(102)由USG(未掺杂硅酸盐玻璃)或BPSG(硼磷硅酸盐玻璃)组成。
    • 77. 发明公开
    • 반도체 장치의 콘택 형성방법
    • 形成半导体器件接触的方法
    • KR1020020020314A
    • 2002-03-15
    • KR1020000053414
    • 2000-09-08
    • 삼성전자주식회사
    • 문광진박희숙최길현
    • H01L21/28
    • PURPOSE: A method for forming a contact of a semiconductor device is provided to control a phenomenon that a resistance value of a contact interface increases in a heat treatment process after the contact is formed, by forming an ohmic layer on the contact interface and by oxidizing the ohmic layer to remove a residual reaction metal layer. CONSTITUTION: An interlayer dielectric(204) is formed on a substrate(200) including a predetermined active region. The interlayer dielectric is patterned to form a contact hole(205) opening the active region. The ohmic layer(207) is formed on the open active region. The upper portion of the ohmic layer is oxidized after a heat treatment is performed. A conductive contact material is deposited on the ohmic layer to fill the contact hole.
    • 目的:提供一种用于形成半导体器件的接触的方法,以控制在接触形成之后的热处理工艺中接触界面的电阻值增加的现象,通过在接触界面上形成欧姆层并通过氧化 欧姆层去除残留的反应金属层。 构成:在包括预定活性区域的衬底(200)上形成层间电介质(204)。 图案化层间电介质以形成打开有源区的接触孔(205)。 欧姆层(207)形成在开放的有源区上。 在进行热处理后,欧姆层的上部被氧化。 导电接触材料沉积在欧姆层上以填充接触孔。
    • 78. 发明公开
    • 반도체장치의 장벽층 제조방법
    • 制造半导体器件的障碍层的方法
    • KR1020000073360A
    • 2000-12-05
    • KR1019990016606
    • 1999-05-10
    • 삼성전자주식회사
    • 이명범박병률문광진
    • H01L21/28
    • PURPOSE: A method for manufacturing a barrier layer of a semiconductor device is provided to control or limit an increase of contact resistance accompanied with a nitrification, by forming a titanium layer of a predetermined thickness, and by etching the titanium layer to selectively reduce the thickness of a part of the titanium layer covering an insulating layer. CONSTITUTION: An insulating layer(200) having a contact hole exposing the surface of a semiconductor substrate(100) is formed. A titanium layer contacting the exposed semiconductor substrate is formed on the insulating layer by a chemical vapor deposition(CVD) method to form a titanium silicide layer(310) on an interface between the titanium layer and the semiconductor substrate contacting the titanium layer. The titanium layer is entirely etched to selectively decrease the thickness of a part covering the insulating layer. The etched titanium layer(350) is nitrified. A nitride titanium layer is formed on the nitrified titanium layer as a barrier layer.
    • 目的:提供一种制造半导体器件的阻挡层的方法,以通过形成预定厚度的钛层来控制或限制伴随着硝化的接触电阻的增加,并且通过蚀刻钛层以选择性地降低厚度 的一部分覆盖绝缘层的钛层。 构成:形成具有暴露半导体衬底(100)的表面的接触孔的绝缘层(200)。 通过化学气相沉积(CVD)方法在绝缘层上形成与暴露的半导体衬底接触的钛层,以在与钛层接触的钛层和半导体衬底之间的界面上形成硅化钛层(310)。 完全蚀刻钛层以选择性地减小覆盖绝缘层的部分的厚度。 蚀刻的钛层(350)被硝化。 在硝化钛层上形成氮化钛层作为阻挡层。