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    • 2. 发明公开
    • 다이나믹형 램과 반도체 장치
    • 动态RAM和半导体器件
    • KR1020010050636A
    • 2001-06-15
    • KR1020000056255
    • 2000-09-25
    • 엘피다 메모리 가부시키가이샤
    • 세키구치토모노리카지가야카즈히코키무라카츠타카타케무라리이치로타카하시츠기오나카무라요시타카
    • G11C11/34
    • G11C7/02G11C5/025G11C5/063G11C7/18G11C11/4074G11C11/4097H01L27/0207H01L27/0214H01L27/10814H01L27/10882H01L27/10885H01L27/10897
    • PURPOSE: To provide a dynamic RAM of single-intersection type, where an operation margin is improved, and to provide a semiconductor device. CONSTITUTION: A dynamic RAM has a plurality of word lines connected to the address selection terminals of a plurality of dynamic memory cells, a plurality of complementary bit line couples connected to respective input/output terminals of the dynamic memory cells and are arranged in mutually opposite directions and a sense amplifier string formed of a plurality of latch circuits, to which operation voltage is given corresponding to the operation timing signal and amplifies the voltage difference of the complementary bit line pairs. Common electrodes installed by making them face an accumulation node being the connection point of address selective MOSFET of the dynamic memory cells installed on both sides with the sense amplifier string as a center and an information storage capacitor are mutually connected, while circuit connections in the sense amplifier string are secured by a wiring means using the electrodes. Thus, complementary noise, generated in the two plate electrodes installed across the sense amplifier string, is canceled and is substantially reduced.
    • 目的:提供一种单路交叉型动态RAM,提高了操作余量,并提供了半导体器件。 构成:动态RAM具有连接到多个动态存储单元的地址选择端的多条字线,连接到动态存储单元的相应输入/输出端的多个互补位线耦合并且相互相对布置 方向和由多个锁存电路形成的读出放大器串,对应于操作定时信号给予操作电压,并放大互补位线对的电压差。 通过使公共电极面对累积节点作为安装在两侧的动态存储单元的地址选择性MOSFET的连接点,以感测放大器串为中心,信息存储电容器相互连接,而电路连接在某种意义上 放大器串由使用电极的布线装置固定。 因此,在安装在感测放大器串两端的两个平板电极中产生的互补噪声被消除并且大大减小。