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1. 发明专利

JP2006191277A Pulse modulating circuit 有权
标题翻译：脉冲调制电路
公开(公告)号：JP2006191277A
公开(公告)日：2006-07-20
申请号：JP2005000514
申请日：2005-01-05
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： ONO MASAYOSHI
IPC分类号： H03K7/00 , G01S7/282 , H03C1/00 , H03F3/72
摘要： PROBLEM TO BE SOLVED: To provide a pulse modulating circuit that can suppress a leak of an RF signal inputted to an amplifier to a bias circuit and applies a DC pulse signal with a narrow pulse width to the amplifier. SOLUTION: The pulse modulating circuit of the present invention is characterized in that a switching means of performing switching operation with the DC pulse signal and a low-pass filter which has a passing area of frequency corresponding to the reciprocal of the pulse width of the DC pulse signal are arranged in this order between a DC power source and a DC bias terminal and a capacitor which has such a capacity value that the impedance from the switching means to the DC power source side is considered to be 0 at respective frequencies corresponding to the reciprocal of the pulse width of the DC pulse signal applied to the switching means. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种脉冲调制电路，其可以抑制向偏置电路输入的放大器的RF信号的泄漏，并向放大器施加窄脉冲宽度的DC脉冲信号。解决方案：本发明的脉冲调制电路的特征在于：利用DC脉冲信号进行开关动作的开关装置和具有对应于脉冲宽度的倒数的通过频率区域的低通滤波器直流脉冲信号按直流电源和直流偏置端子和电容器之间的顺序排列，该电容器具有这样的容量值，使得从各开关装置到直流电源侧的阻抗在各个频率被认为是0 对应于施加到开关装置的DC脉冲信号的脉冲宽度的倒数。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2006157649A Pulse polarity modulation circuit 有权
标题翻译：脉冲极化调制电路
公开(公告)号：JP2006157649A
公开(公告)日：2006-06-15
申请号：JP2004346935
申请日：2004-11-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KAWANO YOICHI
IPC分类号： H03K7/00 , H03F3/45
CPC分类号： H03M5/18
摘要： PROBLEM TO BE SOLVED: To provide a high-speed pulse polarity modulation circuit which realizes low power consumption and small size, and which can reduce the noise generated at a logic midpoint level as baseline of a bipolar pulse.
SOLUTION: The modulation circuit which converts a monopole pulse into a bipolar pulse corresponding to the value of input data, has a configuration where two stages of differential transistor pairs are longitudinally stacked, one of the upper differential transistor pairs gives a polarity modulation pulse output, the gate of the other upper differential transistor pair is made common and the potential at the logic midpoint of high and low levels is given to the gate.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供实现低功耗和小尺寸的高速脉冲极性调制电路，并且可以将在逻辑中点电平处产生的噪声降低为双极性脉冲的基线。解决方案：将单极脉冲转换成与输入数据值相对应的双极性脉冲的调制电路具有纵向堆叠两级差动晶体管对的结构，上部差分晶体管对中的一个给出极性调制脉冲输出，使另一个上部差分晶体管对的栅极共同，并将高电平和低电平逻辑中点的电位提供给栅极。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2005217925A Modulation circuit and modulation method 有权
标题翻译：调制电路和调制方法
公开(公告)号：JP2005217925A
公开(公告)日：2005-08-11
申请号：JP2004024224
申请日：2004-01-30
申请人： Samsung Yokohama Research Institute Co Ltd , 株式会社サムスン横浜研究所
发明人： NAGASAKA HIROYUKI
IPC分类号： H03K7/00 , H03H9/42 , H04B1/7163 , H04J13/00 , H04L25/49
摘要： PROBLEM TO BE SOLVED: To provide a modulation circuit and a modulation method for preventing a direct electric wave, which is caused by parasitic capacity in SAW matched filter as a pulse modulator, namely a signal component transmitted directly from an input terminal to an output terminal, from being radiated as a transmission electric wave to the aerial.
SOLUTION: A positive phase single pulse and a reverse phase single pulse are generated. The positive phase or reverse phase single pulse is modulated into a reference pulse string, and the modulated single pulse and the reverse phase single pulse are modulated into a data pulse string and then these are added and generated as an output.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于防止作为脉冲调制器的SAW匹配滤波器中的寄生电容引起的直流电波的调制电路和调制方法，即直接从输入端子发送到输出端子作为传输电波辐射到天线。
解决方案：产生正相单脉冲和反相单脉冲。正相或反相单脉冲被调制成参考脉冲串，调制单脉冲和反相单脉冲被调制成数据脉冲串，然后将它们相加并产生作为输出。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2002290219A PULSE WIDTH MODULATOR AND DEMODULATOR, AND PULSE WIDTH MODULATION METHOD AND DEMODULATION METHOD 失效
公开(公告)号：JP2002290219A
公开(公告)日：2002-10-04
申请号：JP2001087665
申请日：2001-03-26
申请人： AIWA CO
发明人： SUHARA NAOKI
IPC分类号： H03K7/00 , H04L25/49
摘要： PROBLEM TO BE SOLVED: To provide a pulse width modulation system that can enhance transmission efficiency and recording efficiency of data. SOLUTION: The pulse width modulator is provided with a period detection means that measures the period of a signal to be modulated, a peak detection means that measures the maximum level of the signal to be modulated at the period, and a pulse generating means that generates a pulse with a width corresponding to either of the period and the maximum level and a pulse with a width corresponding to the other of the period and the maximum level. Or the pulse width modulator is also provided with a multiplier means that multiplies the period by a multiple of n and outputs the result to the pulse generating means and with a multiplier means that multiplies the maximum level by a multiple of m and outputs the result to the pulse generating means and the pulse generating means may generate a pulse on the basis of the period multiplied by n and the maximum level multiplied by m. In the case of n, m

5. 发明专利

JP3323124B2 失效
公开(公告)号：JP3323124B2
公开(公告)日：2002-09-09
申请号：JP308898
申请日：1998-01-09
IPC分类号： H03D9/00 , H03C3/00 , H03K7/00 , H04L27/00

6. 发明专利

JPH0785104B2 失效
公开(公告)号：JPH0785104B2
公开(公告)日：1995-09-13
申请号：JP12546987
申请日：1987-05-22
IPC分类号： G01R33/035 , G01R19/00 , H01L39/22 , H03K7/00

7. 发明专利

JPH0779264A QPSK MODULATING DEVICE AND QPSK DEOMDULATING DEVICE 失效
公开(公告)号：JPH0779264A
公开(公告)日：1995-03-20
申请号：JP16264393
申请日：1993-06-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUDA KATSUYA
IPC分类号： H03K7/00 , H04L27/20 , H04L27/22
摘要： PURPOSE:To provide a QPSK modulating device whose circuit configuration can be simplified, and phase noise characteristic can be satisfactory by constituting a first local oscillator of a frequency synthesizer whose step size is small. CONSTITUTION:The synthesizer whose oscillation frequency can be changed by a fine step is used for a first local oscillator 2. Thus, a modulating frequency is not deteriorated much even when the oscillation frequency changes by almost 1MHz, and a variable frequency width is + or -500kHz and a step is 25kHz. Therefore, when the oscillation frequency of a second local oscillator 5 is 340 MHz+ or -40MHz/step 1MHz, a desired intermediate frequency signal can be obtained. Thus, the number of frequency-division can be decreased, and the phase noise characteristic can be improved. Also, in a QPSK demodulating device, a frequency synthesizer whose step size is minute is used for a reference signal reproducer similarly to the first local oscillator 2.

8. 发明专利

JPH06343086A BPSK MODULATION CIRCUIT WITH FLAT ENVELOPE CHARACTERISTIC 失效
公开(公告)号：JPH06343086A
公开(公告)日：1994-12-13
申请号：JP25799091
申请日：1991-10-04
申请人： SAMSUNG ELECTRONIC
发明人： BIYONNJIN CHIYON
IPC分类号： H03C3/04 , H03K7/00 , H04L27/20
摘要： PURPOSE: To prevent distortion from a phase transient supporting point at the time of power amplification by uniforming the levels of all the signals including the phase transient supporting point at the time of BPSK modulation. CONSTITUTION: When a system clock (a) is inputted to a data generating means 10, the means 10 divides 110 the frequency of clock (a) and generates random data synchronously with this clock later. While receiving the output of data generating means 10, a data converting means 20 outputs an in-phase signal I(t) in the form of reception stage to be made alternative synchronously with the clock (a) and a cut phase signal Q(t) to be uni-directionally repeated to a modulating means 30. While receiving a carrier wave signal from a carrier wave oscillator 170, the modulating means 30 performs double bounced modulation to a carrier wave concerning the signal I(t) and performs the single bounce modulation of signal transiting the phase of carrier wave concerning the signal Q(t). An adder 210 adds both the signals and provides the BPSK modulated signal having flat envelope characteristics.

9. 实用新型

JPH0496132U 失效
公开(公告)号：JPH0496132U
公开(公告)日：1992-08-20
申请号：JP433991
申请日：1991-01-17
IPC分类号： H03K7/00

10. 发明专利

JPS6042643B2 失效
公开(公告)号：JPS6042643B2
公开(公告)日：1985-09-24
申请号：JP6260974
申请日：1974-06-04
申请人： HUGHES AIRCRAFT CO
发明人： HIROMU JEI KUNO
IPC分类号： H03B9/12 , H03B23/00 , H03K7/00 , H03L5/00

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