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    • 5. 发明专利
    • SEQUENTIAL BLASTING SYSTEM
    • JPH0875400A
    • 1996-03-19
    • JP10574595
    • 1995-04-28
    • EURO MATSUSHITA ELECTRIC WORKS
    • HAINTSU RITSUTAAUORUFU SHIYUTAINBIHIRAA
    • F42C11/06F42C15/40F42D1/055
    • PURPOSE: To obtain an inexpensive circuit and satisfy the safety of operation even when a faulty detonator exists by a method wherein respective pulses, supplied to one channel in a pair of channels, is provided with a low voltage initial period interval, superposed on respective preceding pulses supplied to the other channel. CONSTITUTION: Respective detonator stages S1, S2..., made so as to be same, are provided with a series circuit, installed between two supply lead wires A, 0. Only when the thyristor T of the stage S1 has become an excited condition, a connection achieves a voltage, permitting a resistor R1 to charge a capacitor C to a high voltage capable of achieving the igniting voltage of the thyristor T in the stage S1. A delay of achieving the excited condition of the thyristor T in the stage S2 after the enabled condition of the thyristor T in the stage S1 depends on the time constant of an RC element, formed by the resistor R1 and the capacitor C. The propagation of a trigger pulse from some stage to a next stage with a predetermined delay has no relation to a detonating means ZE in such a manner.