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1. 发明专利

JP2014103557A Data receiver, dpll device and data receiver control method 有权
标题翻译：数据接收器，DPLL设备和数据接收器控制方法
公开(公告)号：JP2014103557A
公开(公告)日：2014-06-05
申请号：JP2012254642
申请日：2012-11-20
申请人： Fujitsu Ltd , 富士通株式会社
发明人： MATSUURA HIDEYUKI , HONGO HIRONOBU
IPC分类号： H04L7/033 , H03K5/00 , H03L7/08 , H04L7/00
CPC分类号： G06F5/06 , H04J3/07 , H04L7/033 , H04L7/0331
摘要： PROBLEM TO BE SOLVED: To provide a data receiver performing high speed pull-in and noise reduction of received data, and to provide a DPLL device and a data receiver control method.SOLUTION: A write section 11 receives transmission data including actual data and surplus data for adjusting the length of signal, and stores the actual data in a storage section 12. An AND circuit 3 generates a first signal indicating the positions of the actual data and surplus data in the signal length of the transmission data. A signal conversion section 4 generates a second signal indicating the position in the first signal where the position indicating the surplus data is rearranged at a predetermined interval in the signal length. A DPLL section 5 generates a third signal indicating the timing for reading the actual data in the signal length, by smoothing the position of the actual data for the second signal. A read section 13 reads the actual data stored in the storage section 12 by using the third signal.
摘要翻译：要解决的问题：提供一种执行接收数据的高速拉入和降噪的数据接收机，并提供DPLL设备和数据接收机控制方法。解决方案：写入部分11接收包括实际数据和剩余的传输数据用于调整信号长度的数据，并将实际数据存储在存储部分12中。“与”电路3产生指示发送数据的信号长度中的实际数据和剩余数据的位置的第一信号。信号转换部分4产生指示第一信号中的位置的第二信号，其中指示剩余数据的位置以信号长度中的预定间隔重新排列。 DPLL部分5通过平滑第二信号的实际数据的位置产生指示用于读取信号长度中的实际数据的定时的第三信号。读取部分13通过使用第三信号读取存储在存储部分12中的实际数据。

2. 发明专利

JP2014011794A Single line type signal reproduction transmission device and method, and series-connected single line type signal reproduction transmission device 有权
标题翻译：单线型信号再现传输装置及方法及系列连接单线型信号再现传输装置
公开(公告)号：JP2014011794A
公开(公告)日：2014-01-20
申请号：JP2013044199
申请日：2013-03-06
申请人： Macroblock Inc , 聚積科技股▲ふん▼有限公司
发明人： HSIEH SHUN-CHING
IPC分类号： H04L25/40 , H04L7/00 , H04L25/02
CPC分类号： H04L29/02 , H04J3/07 , H04L5/24 , H04L25/0264 , H04L25/245 , H04L25/49 , H04L2007/045
摘要： PROBLEM TO BE SOLVED: To provide a single line type signal reproduction transmission device and method, and series-connected single line type signal reproduction transmission devices.SOLUTION: A single line type signal reproduction transmission device receives a serial packet including a plurality of signal segments, and each of the signal segments includes a data field and a stuff time mark. Each data field is followed by each stuff time mark and includes a plurality of logical 0/1 signal marks, and the cumulative number of the logical 0/1 signal marks is the same in each data field. The single line type signal reproduction transmission device is configured to process the serial packet to output the signal segments sequentially. After the single line type signal reproduction transmission device outputs a data field from a signal segment received before, it outputs staff time marks continuously until it starts processing of a signal segment received next following after a signal segment currently being received at the serial packet.
摘要翻译：要解决的问题：提供单线型信号再现传输装置和方法以及串联单线型信号再现传输装置。解决方案：单线型信号再现传输装置接收包括多个信号段的串行分组，并且每个信号段包括数据字段和填充时间标记。每个数据字段之后是每个填充时间标记，并且包括多个逻辑0/1信号标记，并且逻辑0/1信号标记的累积数量在每个数据字段中相同。单线型信号再现发送装置被配置为处理串行分组以顺序地输出信号分段。在单线型信号再现发送装置从先前接收到的信号段输出数据字段之后，连续地输出人员时间标记，直到开始处理在串行数据包当前正在接收到的信号段之后的下一个接收的信号段。

3. 发明专利

JP2012248989A Transmission device and frequency fluctuation correction method 有权
标题翻译：传输设备和频率波动校正方法
公开(公告)号：JP2012248989A
公开(公告)日：2012-12-13
申请号：JP2011117800
申请日：2011-05-26
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HOTTA SHINGO , MAKISHIMA HIROMICHI , HONMA HIROYUKI , YOKOKURA ICHIRO
IPC分类号： H04J3/00
CPC分类号： H04B17/004 , H04B10/0799 , H04B10/50 , H04B17/20 , H04J3/07 , H04J3/1652
摘要： PROBLEM TO BE SOLVED: To suppress frequency fluctuation propagation.SOLUTION: A transmission device includes a comparison unit, a correction unit, and an addition unit. The comparison unit sets a threshold value corresponding to a nominal frequency in a parameter corresponding to a data amount indicating a signal frequency, and compares an input parameter in which correction amounts were cumulatively added to the parameter with the threshold value. If the input parameter is within the threshold value, the correction unit outputs the input parameter value. If the threshold value exceeds the threshold value, the correction unit outputs the threshold value so as to dissolve an excess of the threshold value and corrects the input parameter. The addition unit detects a correction amount which is an excess amount of the previous input parameter with respect to the threshold value and cumulatively adds the correction amount to the input parameter to be compared this time.
摘要翻译：要解决的问题：抑制频率波动传播。解决方案：发送装置包括比较单元，校正单元和加法单元。比较单元在对应于指示信号频率的数据量的参数中设定与标称频率对应的阈值，并将校正量累加到参数的输入参数与阈值进行比较。如果输入参数在阈值内，则校正单元输出输入参数值。如果阈值超过阈值，则校正单元输出阈值以便解除阈值的过量并校正输入参数。相加单元相对于阈值检测作为先前输入参数的过量的修正量，并且将该校正量累积到与此次进行比较的输入参数相加。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP4955687B2 Interface rate adaptation of asynchronous line to the physical layer with a synchronous line at the connection layer 有权
公开(公告)号：JP4955687B2
公开(公告)日：2012-06-20
申请号：JP2008531603
申请日：2006-09-20
申请人：エリクソンエービー
发明人：オラツィオトスカーノ， , セルジオランツォーネ，
IPC分类号： H04L29/08 , H04J3/00 , H04L7/00
CPC分类号： H04J3/12 , H04J3/0632 , H04J3/07 , H04L7/005 , H04L7/02 , H04L69/324 , H04L2007/045
摘要： A method for adapting the rates of a certain number of asynchronous HDLC channels (15) to a single clock domain suited for interfacing with an HDLC processor (13) through a synchronous pseudo-TDM interface (14) in which the HDLC channels are multiplexed in time and vice versa in the opposite direction. In one direction the algorithm is based on the writing of the HDLC channels in a dedicated buffer (17) and in reading these buffers with a common synchronous clock just above the expected maximum HDLC rate. The under-run condition is avoided by inserting neutral information between the end byte and the start byte of the HDLC packets when this is suggested by the buffer fill monitoring function. A simple function to locate the first and last bytes of each HDLC packet read by the buffer is hence used in combination with the buffer fill monitoring function. The algorithm is also suited in the opposite direction in which different asynchronous physical lines receive their HDLC channels from a synchronous TDM-type interface on condition that this interface clock domain be just below the minimum expected HDLC output rate. In this case also the under-run conditions are avoided by insertion of neutral data after having used the same algorithm described above. Adaptation devices and a telecommunications card using them are also proposed.

5. 发明专利

JP4913137B2 Ethernet adaptation of the various clock frequencies in (registered trademark) Passive Optical Network 有权
公开(公告)号：JP4913137B2
公开(公告)日：2012-04-11
申请号：JP2008519537
申请日：2006-06-27
申请人：テクノバス, インコーポレイテッド
发明人：ハングエン， , ライアンイー．ヒルト， , エドワードダブリュー．ボイド，
IPC分类号： H04L12/44
CPC分类号： H04J3/0638 , H04J3/0652 , H04J3/0682 , H04J3/07 , H04J3/1694 , H04Q11/0067 , H04Q2011/0079
摘要： One embodiment of the present invention provides a system that accommodates different clock frequencies in an EPON. The system receives a signal from the OLT at the ONU and derives an OLT clock. The system also maintains a local clock. The system further receives from the OLT an assignment for an upstream transmission window, during which the ONU can transmit an upstream data burst to the OLT based on the local clock. The system adjusts the number of bits of the data burst without affecting the payload data carried in the data burst, thereby allowing the data burst to fit properly within the upstream transmission window and compensating for frequency differences between the local clock and the OLT clock. The system transmits the data burst based on the local clock in the upstream transmission window.

6. 发明专利

JP2011199548A Transmission apparatus and signal transmission method 有权
标题翻译：传输装置和信号传输方法
公开(公告)号：JP2011199548A
公开(公告)日：2011-10-06
申请号：JP2010063541
申请日：2010-03-19
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KATAGIRI TORU , HONMA HIROYUKI
IPC分类号： H04J3/00
CPC分类号： H04J3/07 , H04J3/0685 , H04J3/1652
摘要： PROBLEM TO BE SOLVED: To perform efficient cross-connection to a plurality of frames different in cycle, in an optical transmission network.SOLUTION: A transmission apparatus stores frame data of a first frame in a second frame having a signal speed different from that of the first frame by the regulation of the amount of stuffs contained in the frame. The transmission apparatus includes: a storage unit storing the first-frame frame data; a first control unit controlling the timing of writing the first-frame frame data in the storage unit based on first stuff information indicating the amount of stuffs contained in the first frame; an arithmetic and logic unit obtaining second stuff information indicating the amount of stuffs contained in the second frame based on a signal speed ratio between the first frame and the second frame; and a second control unit controlling the timing of reading out the first-frame frame data stored in the storage unit based on the second stuff information.
摘要翻译：要解决的问题：为了在光传输网络中执行与周期不同的多个帧的高效交叉连接。传输设备将第一帧的帧数据存储在具有不同于第一帧是通过调节框架中包含的东西的数量。发送装置包括：存储单元，存储第一帧帧数据; 第一控制单元，基于指示包含在第一帧中的填充量的第一填充信息，控制在存储单元中写入第一帧帧数据的定时; 算术和逻辑单元，基于第一帧和第二帧之间的信号速度比，获得指示包含在第二帧中的填充量的第二填充信息; 以及第二控制单元，其基于第二填充信息控制读出存储在存储单元中的第一帧帧数据的定时。

7. 发明专利

JPWO2009037779A1 マルチレート通信装置及びマルチレート通信装置の回線構成制御方法有权
公开(公告)号：JPWO2009037779A1
公开(公告)日：2011-01-06
申请号：JP2009533010
申请日：2007-09-21
申请人：富士通株式会社
发明人：本田　崇 , 崇本田
IPC分类号： H04L29/08 , H04J3/00 , H04L12/931 , H04L12/935
CPC分类号： H04J3/07 , H04J3/1611 , H04J2203/0023 , H04J2203/0073 , H04J2203/0085
摘要： SONET/SDHの回線を収容するマルチレート通信装置に備えられるインタフェースボードに設けられ、伝送モジュールが実装されるポートのうち基準となるポートに実装される伝送モジュールのビットレート(回線速度)に応じて、インタフェースボードに備えられる複数の信号処理回路のそれぞれで処理される回線の構成(回線種別と数量)を制御する。インタフェースボードで処理される第一の回線容量を分割した第二の回線容量の信号を処理する複数のグループを有し、グループ毎に処理される信号を伝送する回線をインタフェースボードに接続するポートと、信号を送受信し、ポートに実装される伝送モジュールの回線種類を判別する回線判別部と、回線判別部の判別結果に基づいて、グループがそれぞれ収容する回線の構成を制御する回線構成制御部と、回線構制御部の制御に基づいて、ポートに実装される伝送モジュールの回線種類に応じて信号を処理する信号処理部を備える。

8. 发明专利

JP4362530B2 Optical transmission equipment, optical transmission systems, bandwidth control method, and a bandwidth control program 有权
公开(公告)号：JP4362530B2
公开(公告)日：2009-11-11
申请号：JP2007296044
申请日：2007-11-14
申请人：富士通株式会社
发明人：裕二島田 , 幸二猫田 , 歩野中 , 英夫黒田
IPC分类号： H04J3/00
CPC分类号： H04J3/1617 , H04J3/07 , H04J14/02 , H04L25/4908

9. 发明专利

JP2009246995A Methods and systems for start code emulation prevention and data stuffing 有权
标题翻译：启动代码仿真预防和数据存储的方法和系统
公开(公告)号：JP2009246995A
公开(公告)日：2009-10-22
申请号：JP2009142785
申请日：2009-06-15
申请人： Microsoft Corp , マイクロソフトコーポレーション
发明人： SULLIVAN GARY J , ESTROP STEPHEN J
IPC分类号： H04N7/26 , H03M1/22 , H03M7/36 , H04N5/76 , H04N7/24
CPC分类号： H04N21/23424 , H04J3/0605 , H04J3/07 , H04N19/184 , H04N19/70 , H04N19/91 , H04N21/2343 , H04N21/44016 , H04N21/8455
摘要： PROBLEM TO BE SOLVED: To provide, in methods and systems, approaches to start code emulation prevention at a granularity higher than the bit level. SOLUTION: By operating at a level other than the bit level, processing capability requirements on both the encoder and the decoder sides can be reduced. A start code emulation prevention method looks for data patterns relative to fixed-size data portions larger than single bits. When a particular pattern is found, start code emulation prevention data are inserted to prevent start code emulation. When a decoder decodes data that have had start code emulation prevention data inserted, it can easily identify legitimate start codes and then can remove the start code emulation prevention data to provide the original data that were protected. In addition, payload data to be rounded up in size are allowed to an integer number of byte sizes, and filler data are allowed to be added in a manner which are easily detectable by a decoder. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：在方法和系统中提供以高于位级别的粒度启动代码仿真预防的方法。解决方案：通过在比特级别以外的级别进行操作，可以减少编码器和解码器侧的处理能力要求。起始码仿真预防方法查找相对于大于单个比特的固定大小数据部分的数据模式。当发现特定模式时，插入启动代码仿真防止数据以防止启动代码仿真。当解码器解码插入了启动码仿真防止数据的数据时，可以轻松识别合法的起始码，然后可以移除起始码仿真预防数据，以提供受保护的原始数据。此外，允许大小的四舍五入的有效载荷数据为整数个字节大小，并且允许以可由解码器容易地检测的方式添加填充数据。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2007259084A Radio transmission apparatus 有权
标题翻译：无线传输装置
公开(公告)号：JP2007259084A
公开(公告)日：2007-10-04
申请号：JP2006080922
申请日：2006-03-23
申请人： Nec Corp , 日本電気株式会社
发明人： SAITO KAICHIRO
IPC分类号： H04L12/42 , H04L12/437 , H04L12/70
CPC分类号： H04J3/085 , H04J3/07 , H04J3/14 , H04J3/1623
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive PDH radio transmission apparatus with excellent efficiency in band usage. SOLUTION: The PDH radio transmission apparatus performs stuff synchronization processing concerning the PDH signal strings of a plurality of channels, stores the signal strings in a radio frame after multiplexing, transmits a radio frame signal to an opposite station via bidirectional radio transmission lines, performs destuff processing after separation in the opposing station, and outputs the PDH signal strings. The apparatus includes: two radio transmitting/receiving means for transmitting/receiving the radio frame signal via the bidirectional radio transmission lines; a repeater circuit means for extracting the PDH signal string from the radio frame signal which is received via one of the bidirectional radio transmission lines, and transmitting it to the other radio transmission line; a frame transmitting means for branching the PDH signal string in two, and performing transmission to node stations by way of the radio transmission lines; and a signal selecting means for selecting one of the PDH signal strings received via the radio transmission lines, based on line quality, so as to output the signal string. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种廉价的PDH无线电传输装置，具有优异的频带使用效率。解决方案：PDH无线传输装置执行与多个信道的PDH信号串相关的填充同步处理，将信号串存储在复用后的无线帧中，经由双向无线传输线将无线帧信号发送到对方站在对置站分离后进行去填充处理，并输出PDH信号串。该装置包括：两个无线电发送/接收装置，用于经由双向无线电传输线路发送/接收无线电帧信号; 中继器电路装置，用于从经由一个双向无线电传输线接收的无线帧信号中提取PDH信号串，并将其发送到另一无线电传输线; 帧发送装置，用于将PDH信号串分为两个，并通过无线电传输线路向节点站传送; 以及信号选择装置，用于基于线路质量来选择经由无线电传输线路接收的一个PDH信号串，以便输出信号串。版权所有（C）2008，JPO＆INPIT

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