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1. 发明专利

JPS5768914A Flat group delay circuit network 失效
标题翻译：平面组延迟电路网络
公开(公告)号：JPS5768914A
公开(公告)日：1982-04-27
申请号：JP14491680
申请日：1980-10-16
申请人： Nec Corp
发明人： YOSHIDA NOBUYOSHI
IPC分类号： H03H7/01 , H04B3/14
CPC分类号： H04B3/146
摘要： PURPOSE:To make the group delay characteristics flat, by selecting the specific frequency of each inverse transfer function as specified, in a flat group delay circuit in which the inverse transfer function is in the n-th order. CONSTITUTION:A flat group delay circuit is formed with at least one set of primary and secondary all pass reactance delay circuit having the n-th order inverse transfer function. An arbitrary one of n sets of specific frequency of this inverse transfer function is set to a predetermined value. The remaining specific frequency of the inverse transfer function is determined so that the group delay characteristics pi(jomega) of the circuit network being a function of the angular frequency can satisfy equation 1, where pi0 is a positive constant, and when the specified specific frequency is a real number, m=1 is obtained and when a complex number, m=2 is obtained. Thus, the group delay characteristics at a band from DC to a specified frequency can be made flat selecting each specific frequency.
摘要翻译：目的：通过在反向传递函数为n阶的平坦组延迟电路中，通过选择每个反向传递函数的特定频率，使组延迟特性平坦。构成：具有至少一组初级和次级全通电抗延迟电路的平坦组延迟电路具有n阶逆传递函数。该反向传递函数的n组特定频率中的任意一个被设定为预定值。确定逆传递函数的剩余特定频率，使得电路网络的角度频率函数的群延迟特性pi（jomega）可以满足等式1，其中pi0是正常数，并且当指定的特定频率是实数，获得m = 1，并且当复数m = 2时获得。因此，可以使从DC到特定频率的频带的组延迟特性平坦地选择每个特定频率。

2. 发明专利

JP4922522B2 ctb reduction of the amplifier due to the phase filtering 有权
公开(公告)号：JP4922522B2
公开(公告)日：2012-04-25
申请号：JP2001550869
申请日：2000-12-14
申请人：ブロードバンドロイヤルティコーポレイション
发明人：エフシェマン，マーセル , マルセヴィッチ，ゾーラン
IPC分类号： H03F1/32 , H03F3/60 , H03F3/68 , H03H7/09 , H03H7/19 , H04B3/14 , H04B10/00 , H04H20/78 , H04N7/10 , H04N7/16 , H04N7/173 , H04N7/22
CPC分类号： H04N7/17309 , H03F1/32 , H03F3/602 , H03F2200/168 , H03H7/19 , H04B3/146 , H04H20/78 , H04N7/102

3. 发明专利

JPS5923932A Delay equalizer 失效
标题翻译：延迟均衡器
公开(公告)号：JPS5923932A
公开(公告)日：1984-02-07
申请号：JP13220582
申请日：1982-07-30
申请人： Toshiba Corp
发明人： IKEHATA NORIMASU
IPC分类号： H04B3/04 , H04B3/14 , H04L25/03
CPC分类号： H04B3/146
摘要： PURPOSE:To provide a suitable compensating amount to delay distortion in response to an opposite party of communication, by a switching device connecting a desired equalizer having a compensating amount to delay distortion in response to the prescribed number of links and a control section switching a corresponding switching section based on the number of links data for combining equalizers, and setting the desired delay distortion compensating amount. CONSTITUTION:In communicating with the Ohme factory, the link number data of it, ''0001'' is inputted. This data is fetched to a microprocessor 19 via an input port 21 and a bus 18. The microprocessor 19 reads out a switching data corresponding to the link data ''0001'' from a table in a memory 20 and transmits the data to an output port 22 via the bus 18. Thus, a corresponding signal is outputted from the output port 22 to a relay group 23, contact 151, 153 of a relay contact section 15 are connected, and contacts 161, 163 of a relay contact section 16 are connected. Then, an equalizer 12 is inserted between a line and an amplifier 11, and the delay distortion compensation for one link's share is performed.
摘要翻译：目的：为了响应于对方的通信提供适当的补偿量以延迟失真，通过将具有补偿量的所需均衡器与响应于规定数量的链路的延迟失真相连接的开关装置和控制部分切换相应的基于用于组合均衡器的链接数据的数量的切换部分，并且设置所需的延迟失真补偿量。规定：在与Ohme工厂进行通信时，输入“0001”的链接号码数据。该数据通过输入端口21和总线18被提取到微处理器19.微处理器19从存储器20中的表读出对应于链接数据“0001”的切换数据，并将该数据发送到输出端口22经由总线18.因此，相应的信号从输出端口22输出到继电器组23，继电器接触部分15的触点151,153连接，继电器触点部分16的触点161,163 连接的。然后，在线路和放大器11之间插入均衡器12，并且执行一个链路共享的延迟失真补偿。

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