会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 10. 发明专利
    • Integrated circuit for analog-digital conversion
    • 用于模拟数字转换的集成电路
    • JPS59104827A
    • 1984-06-16
    • JP21433582
    • 1982-12-07
    • Toshiba Corp
    • FUJITA YASUHIKOMASUDA EIJI
    • H03M1/36H03K5/08H03K5/24H03M1/00
    • H03K5/249H03M1/1071H03M1/361
    • PURPOSE:To reduce the cost at high speed, with high accuracy and low power consumption by outputting continuously the result of comparison between an input signal and a reference voltage to increase the upper limit of an input signal frequency and to eliminate adverse effect due to a parasitic capacitance. CONSTITUTION:A period t1 in which a transient phenomenon is stabilized is provided just after the start of sampling operation a clock signal phi12 is inverted at a time T3 after the period t1 is elapsed to turn on a switch 33 and to turn off a switch 34, and a signal of comparison result from a chopper type comparator 101 is outputted from an output terminal 35. Then, the automatic zero operation is atained by inverting a clock signal phi2, turning on switches 25, 32 of a chopper type comparator 102 and turning off a switch 26. In this case, the state of the comparator 101 is unchanged, the sampling operation is continued and the signal of comparison result is outputted. Further, the operation at the time T1, T2- is performed at time T5, T6-, and the automatic zero and sampling operation are repeated alternately by the comparators 101, 102.
    • 目的:通过连续输出输入信号和参考电压之间的比较结果,以高精度和低功耗降低成本,增加输入信号频率的上限,消除由于 寄生电容。 构成:在采样操作开始之后提供瞬时现象稳定的时间段t1,时钟信号phi12在经过时间段t1之后的T3时刻被反相以接通开关33并关断开关34 并且从输出端子35输出来自斩波器型比较器101的比较结果的信号。然后,通过使时钟信号phi2反转,接通斩波器型比较器102的开关25,32并转动 在这种情况下,比较器101的状态不变,继续采样操作并输出比较结果的信号。 此外,时刻T1,T2-的动作在时间T5,T6-执行,自动零点采样动作由比较器101,102交替重复。