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1. 发明专利

JP2009533157A Embedded sealed structure with no void 审中-公开
公开(公告)号：JP2009533157A
公开(公告)日：2009-09-17
申请号：JP2009505514
申请日：2007-04-12
申请人：プロテウスバイオメディカルインコーポレイテッド
发明人：モハメッドゼット．イスラム， , ベネディクトコステロ， , マークジェンセン， , マークジェイ．ズデブリック， , トッドトンプソン， , ジェレミーフランク，
IPC分类号： A61N1/375
CPC分类号： A61N1/05 , H01L21/561 , H01L23/3107 , H01L24/63 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/15787 , Y10T29/49117 , H01L2924/00
摘要： An implantable integrated circuit structure comprising a conformal thin-film sealing layer for hermetically sealing circuitry layers is provided. Also disclosed are electrode structures, leads that include the same, implantable pulse generators that include the leads, as well as systems and kits having components thereof, other implantable devices utilizing the structures, and methods of making and using the subject structures.

2. 发明专利

JP2012509586A Semiconductor device connection 有权
公开(公告)号：JP2012509586A
公开(公告)日：2012-04-19
申请号：JP2011536950
申请日：2009-11-19
申请人：クロメックリミテッド
发明人：イアンラドリー
IPC分类号： H01L27/14 , H01L21/3205 , H01L21/60 , H01L23/12 , H01L23/52 , H01L27/146
CPC分类号： H01L27/14634 , H01L24/32 , H01L24/63 , H01L24/64 , H01L27/14636 , H01L27/1469 , H01L2924/01005 , H01L2924/01006 , H01L2924/01025 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01057 , H01L2924/01077 , H01L2924/01078 , H01L2924/014 , H01L2924/14
摘要：基板に機械的な接合及び選択的にパターン形成された導電性接合の両方をもたらすために半導体構造を接合する方法は、接合層により基板に半導体構造を機械的に接合するステップと、所望の導電性接合パターンに全体的に対応する接合層にギャップを設けるステップと、基板を貫通して接合層内のギャップに全体的に配置されるビアを設けるステップと、ビアを介して露出される半導体構造に導電性材料を接触させるステップと、を含む。本方法により作製される装置もまた、記載される。
【選択図】図１

3. 发明专利

JP2012183384A Void-free implantable hermetically sealed structure 有权
标题翻译：无密封可塑性密封结构
公开(公告)号：JP2012183384A
公开(公告)日：2012-09-27
申请号：JP2012146983
申请日：2012-06-29
申请人： Proteus Biomedical Inc , プロテウスバイオメディカルインコーポレイテッド
发明人： ZDEBLICK MARK J , COSTELLO BENEDICT , FRANK JEREMY , JENSEN MARC , THOMPSON TODD , ISLAM MOHAMMED Z
IPC分类号： A61N1/375 , H01L21/60 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： A61N1/05 , H01L21/561 , H01L23/3107 , H01L24/63 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/15787 , Y10T29/49117 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a void-free implantable hermetically sealed structure.SOLUTION: An implantable integrated circuit structure comprising a conformal thin-film sealing layer for hermetically sealing circuitry layers is provided. Also disclosed are electrode structures, leads that include the same, implantable pulse generators that include the leads, as well as systems and kits having components thereof, other implantable devices utilizing the structures, and methods of making and using the subject structures. Aspects of the present invention include an implantable structure, e.g., an integrated circuit (IC) device, an IPG, etc., having a conformal, void free sealing layer present on at least a portion of an outer surface thereof to hermetically seal the structure from corrosive environments.
摘要翻译：要解决的问题：提供无空隙的可植入密封结构。提供了一种包括用于密封电路层的保形薄膜密封层的可植入集成电路结构。还公开了电极结构，包括相同的引线，包括引线的可植入脉冲发生器，以及具有其部件的系统和套件，利用该结构的其它可植入装置，以及制造和使用受试结构的方法。本发明的方面包括可植入结构，例如集成电路（IC）装置，IPG等，其具有存在于其外表面的至少一部分上的保形无空隙的密封层以气密地密封结构来自腐蚀性环境。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JPS6159862A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS6159862A
公开(公告)日：1986-03-27
申请号：JP18197284
申请日：1984-08-31
申请人： Fujitsu Ltd
发明人： SAKURAI JUNJI , MUKAI RYOICHI , IZAWA TETSUO
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
CPC分类号： H01L25/0657 , H01L24/63 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2225/06527 , H01L2225/06551 , H01L2225/06555 , H01L2225/06575 , H01L2225/06582 , H01L2924/16195 , H01L2924/00014
摘要： PURPOSE:To improve the integration by laminating a plurality of chips formed with wirings having peripheral end at the outer periphery, contacting the side walls of the chips with the inner surface of a package when containing the laminated chips in the package, and forming wirings contacted with the wirings of the chips in the package. CONSTITUTION:Wirings 4 made of metal layer are formed by connecting electrodes and wirings 2 on chips 1 to extend to the side walls 3 of the chips 1. Then, the chips 1 and insulating plates 5 are alternately laminated and bonded. A package 9 which has wirings 7 of a buried metal layer having an exposure 6 at the position corresponding to the wirings 4 and a cavity 8 is formed. The package 9 is heated to expand the length of one side of the cavity 8, the laminate is inserted into the cavity 8, the wirings 4 are contacted with the exposure 6 of the wirings 7, and the package 9 is gradually cooled. Thus, a semiconductor device of chip-on-chip structure which can sufficiently perform its functions with high integration can be manufactured.
摘要翻译：目的：为了通过在外周层叠形成有具有外周端的布线的多个芯片来改进整合，当将封装中的层叠芯片收纳时，将芯片的侧壁与封装的内表面接触，并且形成接触的布线包装中的芯片布线。构成：通过将芯片1上的电极和布线2连接到芯片1的侧壁3而形成由金属层制成的布线4。然后，芯片1和绝缘板5交替层压并结合。形成具有在与布线4对应的位置处具有曝光6的掩埋金属层的配线7和空腔8的封装9。包装9被加热以扩大空腔8的一侧的长度，将层压体插入空腔8中，布线4与布线7的曝光6接触，并且包装9逐渐冷却。因此，可以制造能够充分发挥其高集成度功能的芯片上芯片结构的半导体器件。

5. 发明专利

JP5876294B2 半導体装置接続有权
标题翻译：半导体设备连接
公开(公告)号：JP5876294B2
公开(公告)日：2016-03-02
申请号：JP2011536950
申请日：2009-11-19
申请人：クロメックリミテッド ,
发明人：ラドリーイアン
IPC分类号： H01L27/146 , H01L21/3205 , H01L21/768 , H01L23/522 , H01L21/60 , H01L23/12 , H01L27/14
CPC分类号： H01L27/14634 , H01L24/32 , H01L24/63 , H01L24/64 , H01L27/14636 , H01L27/1469 , H01L2924/01005 , H01L2924/01006 , H01L2924/01025 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01057 , H01L2924/01077 , H01L2924/01078 , H01L2924/014 , H01L2924/14

7. 发明专利

JP2010034558A Power semiconductor module 审中-公开
标题翻译：功率半导体模块
公开(公告)号：JP2010034558A
公开(公告)日：2010-02-12
申请号：JP2009169994
申请日：2009-07-21
申请人： Semikron Elektronik Gmbh & Co Kg , ゼミクロンエレクトローニクゲーエムベーハーウントコンパニーカーゲー
发明人： MARKUS KNEBEL
IPC分类号： H01L25/07 , H01L25/18
CPC分类号： H01L25/072 , H01L23/041 , H01L23/3675 , H01L23/4985 , H01L24/63 , H01L2224/32188 , H01L2224/83205 , H01L2224/8384 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01033 , H01L2924/01047 , H01L2924/16195 , H01L2924/00015
摘要： PROBLEM TO BE SOLVED: To introduce a power semiconductor module having a housing, a first contact element constituted as to alternately provide continuous layers, and having a second contact element for external contact. SOLUTION: The first contact element 6 is disposed as alternately provided continuous layers, and has a first contact portion 68 abutting against the second contact element 4, and the second contact element 4 comprises: a second contact portion 40, that is disposed inside the power semiconductor module 1 and abuts against the first contact portion 68; and a third contact portion 42 for external contact which is extended through an external surface 36 of the housing 3. A hollow space 5 is formed between the first contact portion 68 of the first contact element 6 and the second contact portion 40 of the second contact element 4, and a conductive filler 50 is provided in the hollow space 5. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：引入具有壳体的功率半导体模块，第一接触元件构成为交替地提供连续层，并具有用于外部接触的第二接触元件。解决方案：第一接触元件6设置成交替设置的连续层，并且具有抵靠第二接触元件4的第一接触部分68，并且第二接触元件4包括：第二接触部分40，其被布置在功率半导体模块1内部并抵靠第一接触部分68; 以及通过壳体3的外表面36延伸的用于外部接触的第三接触部分42.中空空间5形成在第一接触元件6的第一接触部分68和第二接触件的第二接触部分40之间元件4，并且导电填料50设置在中空空间5中。版权所有（C）2010，JPO＆INPIT

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