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1. 发明专利

JP5424638B2 Process for the preparation of nanocrystalline silicon and independently silicon nanoparticles in SiO2 有权
公开(公告)号：JP5424638B2
公开(公告)日：2014-02-26
申请号：JP2008512658
申请日：2006-05-26
申请人：ザ・ガバナーズ・オブ・ザ・ユニバーシティー・オブ・アルバータ
发明人：ジョナサン・ゴードン・コン・ヴェイノット , コリン・マイケル・ヘッセル
IPC分类号： C01B33/12 , B82B3/00 , C01B33/02 , C09K11/08 , C09K11/59
CPC分类号： H01L21/316 , B82Y10/00 , C01B33/021 , H01L21/02134 , H01L21/02282 , H01L21/02337 , H01L21/2022 , H01L21/3124 , Y10T428/24421 , Y10T428/31663
摘要： Methods for preparing nanocrystalline-Si/SiO2 composites by treating hydrogen silsesquioxane (HSQ) under reductive thermal curing conditions are described. Also described are methods of preparing silicon nanoparticles by acid etching the nanocrystalline-Si/SiO2 composites.

2. 发明专利

JP4631437B2 有权
公开(公告)号：JP4631437B2
公开(公告)日：2011-02-23
申请号：JP2004512204
申请日：2003-06-06
IPC分类号： H01L29/786 , G02F1/1345 , G02F1/1362 , G02F1/1368 , G09F9/00 , G09F9/30 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04
CPC分类号： G02F1/13454 , G02F1/1368 , G02F2202/104 , H01L21/2022 , H01L21/2026 , H01L27/12 , H01L27/1285 , H01L29/04 , H01L29/66757 , H01L29/78609 , H01L29/78633 , H01L29/78675
摘要： A display device able to raise a light resistance of pixel transistors without depending upon a light shielding structure and a method of production of same, wherein an average crystal grain size of a polycrystalline silicon film 111 forming an active layer of the pixel transistors is controlled to be relatively small so as to suppress a photo-leakage current. The smaller the crystal grain size, the larger the included crystal defects. Carriers excited by light irradiation are smoothly captured by a defect level, and an increase of a photo-leakage current is suppressed. On the other hand, the average crystal grain size of the polycrystalline silicon film 111 constituting the peripheral transistors is controlled so as to become relatively large. The larger the crystal grain size, the larger the mobility of the carriers, and the higher the drivability of the peripheral transistors. This is because a higher speed operation is required for the peripheral transistors than the pixel transistors due to scanning of pixels and sampling of image signals.

3. 发明专利

JP2009295996A Thin-film transistor 有权
标题翻译：薄膜晶体管
公开(公告)号：JP2009295996A
公开(公告)日：2009-12-17
申请号：JP2009185138
申请日：2009-08-07
申请人： Samsung Mobile Display Co Ltd , 三星モバイルディスプレイ株式會社
发明人： SEO JIN-WOOK , LEE KI-YONG , YANG TAE-HOON , PARK BYOUNG-KEON
IPC分类号： H01L21/20 , H01L21/00 , H01L21/336 , H01L27/01 , H01L29/786
CPC分类号： H01L29/66757 , H01L21/2022
摘要： PROBLEM TO BE SOLVED: To provide a thin-film transistor capable of providing uniform values by improving element characteristics of the thin-film transistor by adjusting the position of seeds formed from a metal catalyst by uniform low-concentration diffusion control of a crystallized catalyst, and forming a channel region in a polycrystalline silicon layer to be close to a single crystal.
SOLUTION: This thin film transistor includes: a metal catalyst layer formed on a substrate, and a first capping layer and a second capping layer pattern sequentially formed on the metal catalyst layer. A method for manufacturing includes steps of: forming a first capping layer on a metal catalyst layer; forming and patterning a second capping layer on the first capping layer; forming an amorphous silicon layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种薄膜晶体管，其能够通过通过均匀的低浓度扩散控制调节由金属催化剂形成的晶种的位置来提高薄膜晶体管的元件特性来提供均匀的值结晶的催化剂，并且在多晶硅层中形成靠近单晶的沟道区。该薄膜晶体管包括：形成在基板上的金属催化剂层，以及依次形成在金属催化剂层上的第一覆盖层和第二覆盖层图案。一种制造方法包括以下步骤：在金属催化剂层上形成第一覆盖层; 在所述第一覆盖层上形成和图案化第二覆盖层; 在所述图案化的第二覆盖层上形成非晶硅层; 扩散金属催化剂; 并使非晶硅层结晶以形成多晶硅层。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2008252108A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2008252108A
公开(公告)日：2008-10-16
申请号：JP2008122404
申请日：2008-05-08
申请人： Samsung Sdi Co Ltd , 三星エスディアイ株式会社
发明人： KAKKAD RAMESH
IPC分类号： H01L21/336 , H01L21/20 , H01L21/268 , H01L29/786
CPC分类号： H01L21/268 , H01L21/2022 , H01L21/2026 , H01L21/84 , H01L29/04 , H01L29/66757 , H01L29/78675
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of forming a polysilicon superior crystallinity, and simultaneously preventing a substrate from being warped due to a high crystallization temperature at crystallization and a method for manufacturing the same.
SOLUTION: The system implements a step that partially crystallizes an amorphous silicon layer, by evaporatively depositing a silicon layer containing the amorphous silicon on the substrate and performing annealing the silicon layer at a specific temperature in an H
2 O atmosphere; a step that forms a polycrystalline silicon film, by irradiating the partially crystallized amorphous layer with laser beam; a step that forms a gate insulating film on the polysilicon layer, and a step that forms a gate electrode on the gate insulating film. This prevents warpage of the substrate caused by the high crystallization temperature at the crystallization with the solid phase crystallization process of the amorphous silicon, and reducing defects is manufactured thin-film transistors.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供能够形成多晶硅优异结晶性并同时防止由于结晶时的高结晶温度导致的基板翘曲的半导体器件及其制造方法。解决方案：该系统通过在衬底上蒸发沉积含有非晶硅的硅层并在H 2 SB 2的特定温度下对硅层进行退火，该系统实现部分结晶非晶硅层的步骤， SB> O气氛; 通过用激光束照射部分结晶的非晶层来形成多晶硅膜的步骤; 在多晶硅层上形成栅极绝缘膜的步骤，以及在栅极绝缘膜上形成栅电极的步骤。由此，能够防止在非晶硅的固相结晶化时结晶时的高结晶化温度导致的基板的翘曲，并且制造薄膜晶体管的缺陷。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP4115990B2 Thin film transistor and a method of manufacturing the same 有权
公开(公告)号：JP4115990B2
公开(公告)日：2008-07-09
申请号：JP2004377842
申请日：2004-12-27
申请人：三星エスディアイ株式会社
发明人：炳建朴 , 根洙李
IPC分类号： H01L21/336 , H01L21/20 , H01L29/786
CPC分类号： H01L29/78675 , H01L21/2022 , H01L21/2026 , H01L29/4908 , H01L29/66757
摘要： The present invention discloses a thin film transistor and a method of fabricating the same. The thin film transistor includes an insulating substrate; and a semiconductor layer, a gate insulating layer, a gate electrode, an interlayer insulator, and a source/drain electrode which are formed on the substrate, wherein the gate insulating layer is formed of a filtering oxide layer having a thickness of 1 to 20 Å.

6. 发明专利

JP4115252B2 Semiconductor film and a method for manufacturing the same, and semiconductor device and a method of manufacturing the same that 有权
公开(公告)号：JP4115252B2
公开(公告)日：2008-07-09
申请号：JP2002325677
申请日：2002-11-08
申请人：シャープ株式会社
发明人：隆之堤 , 道記岩井 , 慎也森野 , 直樹牧田
IPC分类号： H01L21/322 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/417 , H01L29/786
CPC分类号： H01L21/2022 , H01L27/12 , H01L27/1277 , H01L29/41733 , H01L29/66757 , H01L29/78675
摘要： A method of the present invention includes the steps of forming an amorphous semiconductor layer on an insulative surface, adding a catalyst element capable of promoting crystallization to the amorphous semiconductor layer and then performing a first heat treatment so as to crystallize the amorphous semiconductor layer, thereby obtaining a crystalline semiconductor layer, performing a first gettering process to remove the catalyst element from the semiconductor layer, and performing a second gettering process that is different from the first gettering process to remove the catalyst element from the semiconductor layer. The first gettering process includes removing at least large masses of a semiconductor compound of the catalyst element present in the crystalline semiconductor layer. The second gettering process includes moving at least a portion of the catalyst element remaining in the crystalline semiconductor layer so as to form a low-catalyst-concentration region in the crystalline semiconductor layer, the low-catalyst-concentration region having a lower catalyst element concentration than in other regions.

7. 发明专利

JP4095064B2 Thin film transistor and a method of manufacturing the same 有权
公开(公告)号：JP4095064B2
公开(公告)日：2008-06-04
申请号：JP2004377841
申请日：2004-12-27
申请人：三星エスディアイ株式会社
发明人：晉旭徐 , 炳建朴 , 基龍李 , 泰勳梁
IPC分类号： H01L21/336 , H01L21/20 , H01L29/786
CPC分类号： H01L27/1277 , H01L21/2022 , H01L27/1296 , H01L29/04 , H01L29/66757 , H01L29/78675 , Y10S438/923
摘要： A thin film transistor includes a substrate, a semiconductor layer pattern on the substrate, a gate insulating layer on the semiconductor layer pattern, and a gate electrode on a gate insulating layer. Low angle grain boundaries of polysilicon formed in a channel layer in the semiconductor layer pattern are tilted -15 to 15° with respect to a current flowing direction.

8. 发明专利

JP4090223B2 Production of light conductive or cathode conductivity device used in the horizontal direction solid overgrowth method 有权
公开(公告)号：JP4090223B2
公开(公告)日：2008-05-28
申请号：JP2001229289
申请日：2001-07-30
申请人：ヒューレット・パッカード・カンパニーHewlett−Packard Company
发明人：アリソン・チャイケン
IPC分类号： G11B7/26 , H01L21/20 , C30B1/02 , G11B9/00
CPC分类号： B82Y10/00 , C30B1/023 , G11B9/14 , G11B9/1472 , G11B9/149 , H01L21/2022
摘要： A method for crystallizing an amorphous film formed on an underlying layer having an unfavorable crystalline growth morphology is disclosed. The method includes providing a favorable growth substrate and then forming a first unfavorable growth layer on a seeding surface of the favorable growth substrate. An aperture is etched in the first unfavorable growth layer so that the aperture extends through the first unfavorable growth layer down to the seeding surface thereby exposing a portion of the seeding surface. An amorphous media layer is then formed on the first unfavorable growth layer. The amorphous media layer fills the aperture and is in contact with the seeding surface of the favorable growth substrate. A crystallized media layer is formed by annealing the amorphous media layer so that nucleation of a crystalline phase of the amorphous media layer begins at the seeding surface and propagates throughout the entirety of the amorphous media layer so that the remainder of the amorphous media layer is crystallized to form the crystallized media layer. Consequently, the crystallized media layer has a useful morphology due to nucleation of crystallization on the favorable growth substrate while being formed on the first unfavorable growth layer which tends to induce an unfavorable crystalline growth morphology. The crystallized media layer can be used as a data storage medium in an ultra-high density data storage device.

9. 发明专利

JP4013074B2 A method of forming a polycrystalline silicon thin-film transistor 有权
公开(公告)号：JP4013074B2
公开(公告)日：2007-11-28
申请号：JP2005153368
申请日：2005-05-26
申请人：ビーオーイーハイディステクノロジー株式会社
发明人：章淳任 , ▲キョン▼ 錫孫 , 宰徹朴 , 俊 ▲ホ▼ 李 , 明官柳 , 世烈権 , 億洙金
IPC分类号： H01L21/336 , H01L21/20 , H01L29/786
CPC分类号： H01L27/1285 , H01L21/2022 , H01L27/1296 , H01L29/04 , H01L29/66757
摘要： A method for forming a polycrystalline silicon thin film transistor. The method includes the steps of: forming a polycrystalline silicon layer including multiple protrusions by crystallizing the amorphous silicon layer according to a crystallization method in which the multiple protrusions are formed due to collision between crystal grains; patterning the polycrystalline silicon layer in an active pattern which includes only two protrusions of the multiple protrusions, which are apart from each other and located at both sides of a gate electrode-forming area; applying a barrier layer on the patterned polycrystalline silicon layer while partially covering the two protrusions; and forming a source electrode and a drain electrode at the protrusions of the polycrystalline silicon layer formed at both sides of the gate electrode-forming area by ion-implanting dopants into a resultant lamination.

10. 发明专利

JP3983334B2 A method for manufacturing a semiconductor device 失效
公开(公告)号：JP3983334B2
公开(公告)日：2007-09-26
申请号：JP5384397
申请日：1997-02-20
申请人：株式会社半導体エネルギー研究所
发明人：久大谷
IPC分类号： H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/786
CPC分类号： H01L21/2022 , H01L27/1277 , H01L29/66757 , Y10S148/016
摘要： A method of manufacturing a crystalline silicon film excellent in crystallinity. When using elements such as nickel as metal elements that promotes the crystallization of the amorphous silicon film, nickel is allowed to be contained in a solution repelled by the surface of the amorphous silicon film. Then, a part of the amorphous silicon film is removed, and the solution is held in only that part. In this way, the nickel elements are selectively introduced into a part of the amorphous silicon film, and a heat treatment is also conducted to allow crystal growth to proceed from that portion toward a direction parallel to a substrate.

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