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1. 发明专利

JP2008103057A Wobble detection method, wobble detection device, and wobble detection program 审中-公开
标题翻译： WOBBLE检测方法，无线检测装置和无线检测程序
公开(公告)号：JP2008103057A
公开(公告)日：2008-05-01
申请号：JP2007226296
申请日：2007-08-31
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI
IPC分类号： G11B7/005 , G11B20/10
摘要： PROBLEM TO BE SOLVED: To exactly and stably demodulate recorded information of a data wobble column by accurately performing synchronous detection even when a distortion is caused in a wobble signal due to the deterioration of an optical disk or high density recording.
SOLUTION: A waveform multiplication section 21 multiplies wobble sampling data from an A/D conversion circuit 7 by a reference wave to obtain a synchronous detection value. A multiplied value integrating section 24 integrates the synchronous detection value for a first predetermined section. An integrated value level determination section 25 computes the integrated value from the multiplied value integrating section 24 for a second predetermined section to calculate the integrated value level, and determines high/low relation between the integrated value level with the previous integrated value level obtained from an integrated value level storage section 26. A reference wave phase control section 23 controls the phase of the output reference wave of a reference wave generation section 22 so that the above integrated value level becomes maximum or minimum, and a change in the integrated value level is made maximum at the before/after the specific pattern of wobble.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：即使当由于光盘的劣化或高密度记录而在摆动信号中引起失真时，通过精确地执行同步检测来精确且稳定地解调数据摆动列的记录信息。解决方案：波形乘法部分21将来自A / D转换电路7的摆动采样数据乘以参考波，以获得同步检测值。相乘值积分部分24对第一预定部分的同步检测值进行积分。积分值水平确定部25针对第二预定部分计算来自乘积值积分部24的积分值，以计算积分值水平，并且确定积分值水平与从先前积分值水平获得的高/低关系基准波相位控制部23控制基准波生成部22的输出基准波的相位，使得上述积分值电平变为最大或最小，并且积分值电平的变化为在特定的摆动模式之前/之后最大化。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2004318939A Method and device for detecting wobble information of optical recording medium 审中-公开
公开(公告)号：JP2004318939A
公开(公告)日：2004-11-11
申请号：JP2003108582
申请日：2003-04-14
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI
IPC分类号： G11B20/14 , G11B7/005
CPC分类号： G11B7/0053 , G11B7/0052
摘要： PROBLEM TO BE SOLVED: To provide a method and device for accurately detecting binary information recorded by applying wobbling along the track of an optical recording medium by a phase modulation method.
SOLUTION: A phase integral period is preliminarily set in a reference wobble section and each unit data section of a data wobble string by detecting a synchronous pattern, and in starting phase integration in each section, a phase integral value is initialized to be set to a zero level. A phase integral value relating to a reference wobble is stored in a storing part, the polarity of a phase integral value in each unit data section is compared with the polarity of a phase integral value of the reference wobble, and whether the polarities are the same or reverse is confirmed to determine binary information of each unit data section. Since the determination is made on the basis of polarity comparison of the phase integral values, it is hard to be affected by wobble signal distortion and phase inversion caused by deterioration of the optical recording medium and crosstalk between adjacent tracks with each other to be able to correctly and stably detect recorded information of a data wobble string.
COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2006164490A Device, method and program of detecting synchronizing signal 审中-公开
标题翻译：检测同步信号的设备，方法和程序
公开(公告)号：JP2006164490A
公开(公告)日：2006-06-22
申请号：JP2005257532
申请日：2005-09-06
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI
IPC分类号： G11B20/10
CPC分类号： G11B20/1403 , G11B7/0053 , G11B27/105 , G11B27/24 , G11B27/3027
摘要： PROBLEM TO BE SOLVED: To detect a synchronizing signal to generate a timing signal even when bit shift, etc. is generated in the reproduced synchronizing signal by degradation and density increase, etc. of a recording medium. SOLUTION: In a synchronizing signal detection circuit device, when a wobble pattern of a synchronizing signal is inputted from a synchronous detection circuit 7 in a synchronizing signal detection circuit 8, a first sync pattern comparing section 14 compares the wobble pattern with a first sync pattern which is the same as a sync signal stored in a first storage part 11. A second sync pattern comparing section 15 compares each pattern of the sync signals stored in the second storage part 12 with a second synch pattern specified by one pattern having time fluctuation. A sync signal deciding section 17 decides sync signal detection based on comparison results and synchronization state decision result in a synchronization state deciding section 20 based on comparison results to the previous time. A timing signal generating section 18 generates and outputs a timing signal based on decision output from the sync signal deciding section 17 and the synchronization state stable section 20. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：即使当通过记录介质的劣化和密度增加等在再现的同步信号中产生位移等时，也检测同步信号以产生定时信号。解决方案：在同步信号检测电路装置中，当在同步信号检测电路8中从同步检测电路7输入同步信号的摆动模式时，第一同步模式比较部分14将摆动模式与第一同步模式与存储在第一存储部分11中的同步信号相同。第二同步模式比较部分15将存储在第二存储部分12中的同步信号的每个模式与由一个模式指定的第二同步模式进行比较，时间波动。同步信号决定部17基于与前一次的比较结果，基于比较结果和同步状态判定部20中的同步状态判定结果来决定同步信号检测。定时信号生成部18根据来自同步信号决定部17和同步状态稳定部20的判定输出生成并输出定时信号。（C）2006，JPO＆NCIPI

4. 发明专利

JP2004288369A Viterbi decoding method 有权
公开(公告)号：JP2004288369A
公开(公告)日：2004-10-14
申请号：JP2004158895
申请日：2004-05-28
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： HAYAMIZU ATSUSHI , OKI TAKESHI
IPC分类号： G11B20/14 , G11B20/10 , G11B20/18 , H03M13/41
摘要： PROBLEM TO BE SOLVED: To solve the following problem; conventionally, when reproducing the data recorded on a recording medium by a Viterbi algorithm, a favorable reproducing performance cannot be maintained if there are non-uniformity of recording mark shapes caused by medium characteristics and non-linear distortion of a reproduced waveform.
SOLUTION: Based on a decoded data sequence outputted from a path memory 12, a data estimation circuit 14 outputs an estimated data estimating the input data at a point in time before a predetermined bit period earlier than the input data. A target value calculation circuit 15 corrects a target value adopting a difference between the estimated data and the input data as a target value error, and outputs a plurality of 1st target values obtained to a branch metric operation circuit 11 as a plurality of target values. Since the branch metric operation circuit 11 is able to perform branch metric operation based on the plurality of 1st target values approaching to a plurality of averages values with the highest appearance frequency (having a peak in a histogram), the decoding performance can be improved rather than using a fixed target value.
COPYRIGHT: (C)2005,JPO&NCIPI

5. 发明专利

JP2004265595A Viterbi decoder 有权
公开(公告)号：JP2004265595A
公开(公告)日：2004-09-24
申请号：JP2004158896
申请日：2004-05-28
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： HAYAMIZU ATSUSHI , OKI TAKESHI
IPC分类号： G11B20/18 , H03M13/41
摘要： PROBLEM TO BE SOLVED: To provide a viterbi decoder which keeps good reproduction performance even when unevenness of recording power and shapes of record marks caused by a medium characteristic and non-linear distortion of a reproduction waveform caused by a reproduction characteristic are caused when record data recoded in a recording medium is reproduced using viterbi algorithm.
SOLUTION: A data estimating circuit 14 outputs estimation data in which input data at a point of time earlier than the input data by a prescribed bit period is estimated based on a decoding data group outputted from a path memory 12. A target value arithmetic circuit 15 performs correction of the target value making difference between estimation data and input data as a target value error, and output obtained first target values to a branch metric arithmetic circuit 11 as a plurality of target values. As the branch metric arithmetic circuit 11 can perform branch metric operation based on the plurality of first target values approaching to a plurality of average values of which the appearance frequency is the highest (have a peak value in histogram), decoding performance is improved compared with that in which a fixed target value is used.
COPYRIGHT: (C)2004,JPO&NCIPI

6. 发明专利

JP2003018012A Digital signal modulation method, digital signal modulator, and digital signal recording medium 审中-公开
标题翻译：数字信号调制方法，数字信号调制器和数字信号记录介质
公开(公告)号：JP2003018012A
公开(公告)日：2003-01-17
申请号：JP2001198296
申请日：2001-06-29
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： HAYAMIZU ATSUSHI , OKI TAKESHI , KUROIWA TOSHIO
IPC分类号： G11B20/14 , H03M5/06 , H03M7/14 , H03M7/46
摘要： PROBLEM TO BE SOLVED: To provide a method for generating a digital modulation signal for DSV(digital sum value) control with high performance producing no low frequency component in the case of generating the digital modulation signal by run length coding and NRZI(non return to zero inverted recording) conversion by a prescribed method.
SOLUTION: A synchronous word generating means 123 generates 1st and 2nd synchronous words from which number of inversion times, resulting in different polarities are obtained through the NRZI conversion, an address generating section 122 generates 1st and 2nd coded sequence data by allocating generated coded data to the two synchronous words, while referring to a run length coding table 13, a peak value comparison section 129 compares DSV arithmetic result stored in DSV arithmetic peak value memories 126, 127 receiving coded sequence data with a smaller DC component caused at the NRZI conversion among the coded sequence data and selects and obtains the coded sequence data obtained as the smaller DC component data.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种用于在通过游程长度编码和NRZI生成数字调制信号的情况下生成不具有低频分量的DSV（数字和值）控制的数字调制信号的方法（不返回到零反转记录）转换。解决方案：同步字产生装置123产生第一和第二同步字，通过NRZI转换获得产生不同极性的反转时间数，地址产生部分122通过将产生的编码数据分配到两个同步字，在参考游程长度编码表13的同时，峰值比较部分129将存储在DSV算术峰值存储器126,127中的DSV运算结果与接收编码序列数据与NRZI转换引起的较小DC分量进行比较，编码序列数据，并选择并获得作为较小DC分量数据获得的编码序列数据。

7. 发明专利

JP2005327439A Detection method, detection device, and detection program of synchronizing signal in optical disk device 审中-公开
标题翻译：检测方法，检测装置和光盘装置中同步信号的检测程序
公开(公告)号：JP2005327439A
公开(公告)日：2005-11-24
申请号：JP2005083294
申请日：2005-03-23
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI
IPC分类号： G11B20/14 , G11B7/005
摘要： PROBLEM TO BE SOLVED: To raise detection probability of a synchronous signal while maintaining its detection accuracy in recording and reproducing of an optical disk which records the synchronous signal, address information and the like by the wobble. SOLUTION: A synchronous pattern comparison and determination section 21 determines presence of detection of a synchronous signal by selectively setting a first comparison mode which compares the whole synchronous signal pattern with a wobble signal, and a second comparison mode which compares a specific pattern which consists of characteristic patterns in the synchronous signal pattern with the wobble signal. A synchronous state determination section 24 determines whether a synchronous lock-in state or an out-of-synchronization state by referring to each of count numbers of a synchronous signal counter 22 and an out-of-synchronization counter 23 which are increased and decreased based on the determination results of the synchronous comparison pattern determination section 21. The synchronous pattern comparison and determination section 21 sets the first comparison mode in the out-of-synchronization state and the second comparison mode in the synchronous lock-in state. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提高同步信号的检测概率，同时保持其记录和再现通过摆动记录同步信号，地址信息等的光盘的检测精度。解决方案：同步模式比较和确定部分21通过选择性地设置将整个同步信号模式与摆动信号进行比较的第一比较模式来确定同步信号的检测的存在;以及比较特定模式的第二比较模式其由具有摆动信号的同步信号模式中的特征模式组成。同步状态确定部分24通过参考基于增加和减少的同步信号计数器22和失步计数器23的每个计数号来确定是否同步锁定状态或失步状态对同步比较模式判定部21的判定结果进行说明。同步模式比较判定部21将同步锁定状态的不同步状态和第二比较模式中的第一比较模式进行设定。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2005149586A Information detection method, information detector, and information detection program 审中-公开
标题翻译：信息检测方法，信息检测器和信息检测程序
公开(公告)号：JP2005149586A
公开(公告)日：2005-06-09
申请号：JP2003383431
申请日：2003-11-13
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI , HAYAMIZU ATSUSHI
IPC分类号： G11B20/10 , G11B20/18
摘要： PROBLEM TO BE SOLVED: To provide a method for accurately detecting information (for instance, basic information such as an information reproduction condition from a recording medium) from the recording medium even under a deteriorated reproduction condition.
SOLUTION: A code word block constituted of an information part, a second correction code for it, and a first correction code for respective sub blocks which are obtained by dividing the information part and the second correction code by a prescribed unit, is repeatedly recorded in the prescribed area of the recording medium. Every time each code word block is read, it is stored in a first storage means, error correction using each first correction code to each sub block is executed, and the sub block which becomes correctable even once is held in a corresponding storage area in a second storage means. In the case that the number of the sub blocks in which an uncorrectable state continues becomes equal to or less than the number based on the correction ability of the second correction code, data stored in the second storage means are corrected by using the second correction code, and the information part is detected from the corrected data.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：即使在劣化的再现条件下，也提供从记录介质准确地检测信息（例如，诸如信息再现条件的基本信息）的方法。解决方案：由信息部分，其第二校正码和通过将信息部分和第二校正码除以规定单位而获得的各个子块的第一校正码构成的码字块是重复地记录在记录介质的规定区域中。每次读取每个代码字块时，将其存储在第一存储装置中，执行使用每个子块的每个第一校正码的纠错，并且即使一次可修正的子块被保存在相应的存储区域中第二存储装置。在继续进行不可校正状态的子块的数量等于或小于基于第二校正码的校正能力的数量的情况下，通过使用第二校正码来校正存储在第二存储装置中的数据，并且根据校正数据检测信息部分。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2004288368A Viterbi decoder 有权
公开(公告)号：JP2004288368A
公开(公告)日：2004-10-14
申请号：JP2004158894
申请日：2004-05-28
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： HAYAMIZU ATSUSHI , OKI TAKESHI
IPC分类号： G11B20/14 , G11B20/10 , G11B20/18 , H03M13/41
摘要： PROBLEM TO BE SOLVED: To solve the following problem; conventionally, when reproducing the data recorded on a recording medium by a Viterbi algorithm, a favorable reproducing cannot be maintained if there are non-uniformity of recording mark shapes caused by medium characteristics and non-linear distortion of a reproduced waveform.
SOLUTION: Based on a decoded data sequence outputted from a path memory 12, a data estimation circuit 14 outputs an estimated data estimating the input data at a point in time before a predetermined bit period earlier than the input data. A target value calculation circuit 15 corrects a target value adopting a difference between the estimated data and the input data as a target value error, and outputs a plurality of 1st target values obtained to a branch metric operation circuit 11 as a plurality of target values. Since the branch metric operation circuit 11 is able to perform branch metric operation based on the plurality of 1st target values approaching to a plurality of average values with the highest appearance frequency (having a peak in a histogram), the decoding performance can be improved rather than using a fixed target value.
COPYRIGHT: (C)2005,JPO&NCIPI

10. 发明专利

JP2003032119A Digital signal modulation method, digital signal modulator, recording medium and transmitter, and program 审中-公开
标题翻译：数字信号调制方法，数字信号调制器，记录介质和发送器及程序
公开(公告)号：JP2003032119A
公开(公告)日：2003-01-31
申请号：JP2001217406
申请日：2001-07-18
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： OKI TAKESHI , HAYAMIZU ATSUSHI , KUROIWA TOSHIO
IPC分类号： G11B20/14 , H03M7/14
摘要： PROBLEM TO BE SOLVED: To provide a digital signal modulation method that conducts high performance DSV(digital sum value) control without causing a low frequency component even at points of time other than a DSV control point of time because the reduction in the low frequency component is not sufficient by a conventional method that reduces the absolute value of a DSV value at the DSV control point of time.
SOLUTION: When choices are detected in a source code fed to a conversion section 12, a DSV square operation product extracted respectively from DSV square operation integral memories 128, 129 is fed to a square integral value comparison section 130, which compares the DSV square operation integral values of the both and gives the obtained comparison result to a memory control code output section 131. The memory control code output section 131 obtains a code word with a smaller DSV square operation integral value from a code word memory 124 or 125 on the basis of a supplied comparison result as a code word sequence comprising the code word supplied in succession to a synchronous word and outputs the obtained code sequence as a digital modulation signal subjected to (p-q) modulation.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了提供即使在除DSV控制时间点之外的时间点也不引起低频分量的高性能DSV（数字和值）控制的数字信号调制方法，因为低频分量的降低通过降低DSV控制点的DSV值的绝对值的传统方法是不够的。解决方案：当在馈送到转换部分12的源代码中检测到选择时，分别从DSV平方运算积分存储器128,129中提取的DSV平方运算产物被馈送到平方整数值比较部分130，其将DSV平方运算两者的积分值，并将获得的比较结果提供给存储器控制代码输出部分131.存储器控制代码输出部分131基于代码字存储器124或125从代码字存储器124或125获得具有较小DSV平方运算积分值的代码字提供的比较结果作为包括连续提供给同步字的码字的码字序列，并且将获得的码序列作为经受（pq）调制的数字调制信号输出。

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