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    • 1. 发明专利
    • Active matrix liquid crystal display
    • 主动矩阵液晶显示
    • JP2005215702A
    • 2005-08-11
    • JP2005107473
    • 2005-04-04
    • Toshiba CorpToshiba Electronic Engineering Corp東芝電子エンジニアリング株式会社株式会社東芝
    • HANAZAWA YASUYUKIYAMAMOTO KAYOIZUKI YOSHIHARUKITAZAWA TOMOKONAGAYAMA KOHEINAKAZATO MASAHIROTAKEBAYASHI KISAKOIIZUKA TETSUYA
    • G02F1/1368G09F9/30
    • PROBLEM TO BE SOLVED: To provide an active matrix liquid crystal display capable of obtaining satisfactory display performance with low power consumption, by improving the aperture rates of pixels. SOLUTION: This liquid crystal display is constituted to have 1st storage capacity formed between a storage capacity electrode 42 and a pixel electrode 10, and 2nd storage capacity formed between the storage capacity electrode 42 and a storage capacity line 15, by providing the storage capacity electrode 42 on the storage capacity line 15 via a semiconductor layer 32 and an insulating film 9, made of the same materials as a semiconductor layer 32 and a gate insulating film 16, constituting a thin-film transistor 8 and connecting the pixel electrode 10 to the storage capacity electrode 42, through a contact hole 18 penetrating a protective insulating film 36 and an inter-layer insulating film 9 of the thin-film transistor 8 provided on the storage capacity electrode 42. COPYRIGHT: (C)2005,JPO&NCIPI
    • 解决的问题:通过提高像素的开口率,提供能够以低功耗获得令人满意的显示性能的有源矩阵液晶显示器。 解决方案:该液晶显示器被构成为具有在存储电容电极42和像素电极10之间形成的第一存储容量,以及形成在存储电容电极42和存储容量线15之间的第二存储容量, 通过半导体层32和由与半导体层32和栅极绝缘膜16相同的材料制成的绝缘膜9在存储电容线15上形成存储电容电极42,构成薄膜晶体管8,并连接像素电极 10通过穿过保护绝缘膜36的接触孔18和设置在存储电容电极42上的薄膜晶体管8的层间绝缘膜9连接到存储电容电极42.版权所有:(C) 2005年,JPO&NCIPI
    • 8. 发明专利
    • LIQUID CRYSTAL DISPLAY DEVICE
    • JPH05203997A
    • 1993-08-13
    • JP1113292
    • 1992-01-24
    • TOSHIBA CORPTOSHIBA ELECTRONIC ENG
    • IIZUKA TETSUYA
    • G02F1/136G02F1/1365
    • PURPOSE:To provide the liquid crystal display device which can reduces a display irregularity due to a difference in resistance value among lead-out electrodes. CONSTITUTION:A transparent electrode pattern 31 of ITO is formed as a transparent electrode on the lead-out electrodes 14, connected to an external connection terminal 15, across liquid crystal. The area of the transparent electrode pattern 31 which faces the lead-out electrodes 14 is made small at the position facing the lead-out electrodes 14 which are long in overall length and large at the part facing the lead-out electrodes 14 which are short in overall length. Small liquid crystal capacity is formed at the part where the overall-length resistance value of the lead-out electrodes 14 is large and small liquid crystal capacity is formed at the part where the overall-length resistance value of the lead-out electrodes 14 is small. Even when the lead-out electrodes 14 differ in length to differ in resistance value, the impedance values obtained by adding the resistance values of the lead-out electrodes 14 and the liquid crystal capacity of the lead-out electrodes 14 and transparent electrode pattern 31 are made constant. The display irregularity due to the difference in resistance value among the lead-out electrodes 14 is reduced.
    • 10. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPH0465867A
    • 1992-03-02
    • JP17747390
    • 1990-07-06
    • TOSHIBA CORP
    • NOGAMI KAZUTAKAIIZUKA TETSUYA
    • H01L27/04H01L21/822H01L23/60
    • PURPOSE:To make it possible to mixedly mount a circuit which is strong in electrostatic breakdown and weak in noise and a circuit which is liable to generate noise, by connecting, via a resistance element, different pins for supplying a first electric potential to a first and a second circuits. CONSTITUTION:Noise generated from a circuit 23 travels to a circuit 22 via a resistance element 31. The power supply of a first circuit 22 and the ground are generally provided with a capacitor of several hundreds pF or more. The noise is attenutated by the effect of RC delay due to said capacitor and the resistance element. When a high voltage caused by static electricity is applied across the signal pad 24 of the circuit 22 and a power supply pad 29 of the circuit 23 or the ground pad 30, electric charge is discharged to the power supply pad 29 or the ground pad 30 through an input protecting circuit in the circuit 22 and the resistor 31. As a result, a high voltage is not applied to transistors in the circuit 23, so that these transistors are protected from electrostatic breakdown.