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1. 发明专利

JP2006140323A Thin substrate carrier and its manufacturing method 审中-公开
标题翻译：薄基板载体及其制造方法
公开(公告)号：JP2006140323A
公开(公告)日：2006-06-01
申请号：JP2004328794
申请日：2004-11-12
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： MUGITANI HIDEJI , YUASA MINORU , SHIMAMURA MASAYA
IPC分类号： H05K3/00 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide a thin substrate carrier wherein the change in quantity of a cream solder can be prevented and a thin substrate carrier can be easily peeled off.
SOLUTION: An adhesive resin layer (5) is formed on the upper surface of the base plate (3) of a thin substrate carrier (1), and the upper surface of the adhesive resin layer is divided into a non-processed area (7) and a processed area (9). The processed area is processed by plasma or modified at molecular level to make adhesive strength lower than that of the non-processed area. Since a part weak in adhesive strength is formed on the upper surface of the adhesive resin layer through the modification, the thin substrate can be easily removed. There occurs no unevenness on the upper surface of the adhesive resin layer that tends to deform the thin substrate, so that the change in quantity of a cream solder due to deformation can be efficiently prevented.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种薄衬底载体，其中可以防止膏状焊料的量的变化，并且可以容易地剥离薄的衬底载体。解决方案：在薄基板载体（1）的基板（3）的上表面上形成粘合树脂层（5），并将粘合树脂层的上表面分成未加工区域（7）和处理区域（9）。处理区域通过等离子体处理或在分子水平上进行改性，使得粘合强度低于未处理区域的粘合强度。由于通过改性在粘合树脂层的上表面上形成弱粘合强度的部分，所以可以容易地除去薄的基板。在粘合树脂层的上表面上不会发生容易使薄基板变形的不平坦度，从而可以有效地防止由于变形引起的膏状焊料的量的变化。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2007258654A Circuit board land connection method and the circuit board 审中-公开
标题翻译：电路板土地连接方法和电路板
公开(公告)号：JP2007258654A
公开(公告)日：2007-10-04
申请号：JP2006114995
申请日：2006-03-22
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： YUASA MINORU , SHIMAMURA MASAYA
IPC分类号： H05K3/34 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To provide a circuit board land connection method for readily making short-circuiting when land is unnecessary land and avoiding short-circuit in mounting an electronic component. SOLUTION: This method bores a hole 3 between the paired lands 2, in such a way that a conductor 4 for short-circuit is exposed via the hole 3 from within a circuit board 1. When the land is not required, it fills a solder paste in the hole 3 and then fuses it there to short-circuit the lands 2. When an electronic component is to be mounted, it uses the hole 3 to prevent a capillary phenomenon to avoid unnecessary short-circuit. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种电路板接地连接方法，用于在不需要地面时容易发生短路，并避免在安装电子部件时短路。解决方案：该方法在成对的焊盘2之间插入孔3，使得用于短路的导体4经由孔3从电路板1中暴露出来。当不需要焊盘时，在孔3中填充焊膏，然后将其熔化在那里以使焊盘2短路。当要安装电子部件时，它使用孔3来防止毛细管现象，以避免不必要的短路。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2006147608A Thin substrate carrier and its manufacturing method 审中-公开
标题翻译：薄基板载体及其制造方法
公开(公告)号：JP2006147608A
公开(公告)日：2006-06-08
申请号：JP2004331413
申请日：2004-11-16
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： MUGITANI HIDEJI , SHIMAMURA MASAYA , YUASA MINORU
IPC分类号： H05K3/00 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide a thin substrate carrier where dispersion of an amount of cream solder is prevented and a thin substrate is easily peeled.
SOLUTION: An adhesion resin layer (5) is formed on the upper face of a base plate (3) in the thin substrate carrier (1). The upper face of the adhesion resin layer is divided into a thick region (7) and thin regions (9). Since the adhesion force of the thin region is weaker than that of the thick region, the thin substrate is easily peeled. Irregularities with which the thin substrate is distorted are not formed on the upper face of the adhesion resin layer. Thus, the dispersion of the amount of cream solder due to distortion can effectively be prevented.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供防止一定量的膏状焊料的分散和薄的基材容易剥离的薄的基板载体。解决方案：在薄基板载体（1）中的基板（3）的上表面上形成粘合树脂层（5）。粘合树脂层的上表面分为厚区域（7）和薄区域（9）。由于薄区域的粘附力弱于厚区域的粘附力，所以薄的基板容易剥离。不会在粘合树脂层的上表面上形成薄基板变形的不规则性。因此，可以有效地防止由于变形引起的奶油焊料的量的分散。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2008016784A Tape-packaged component feeder and feeding method 审中-公开
标题翻译：胶带包装成分供料器和送料方法
公开(公告)号：JP2008016784A
公开(公告)日：2008-01-24
申请号：JP2006207091
申请日：2006-06-30
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： YUASA MINORU , SHIMAMURA MASAYA , HASHIZUME TAKAO
IPC分类号： H05K13/02
摘要： PROBLEM TO BE SOLVED: To provide a tape-packaged component feeder and a tape-packaged component feeding method suitable to feeding of chip-like electronic components. SOLUTION: The tape-packaged component feeder 10 has a tape forwarding means for intermittently forwarding a carrier tape 11, and a top tape winding means. In the feeder 10, a cutting blade 18a is disposed on a position before the position of peeling the top tape 14 from the carrier tape 11 and different from the thickness dimension of the top tape 14, a plurality of tape pressing means 17 are disposed at a position P1 of peeling the top tape 14, and a component guide 19 is disposed at a position different from the thickness dimension of the top tape 14 on a cutting track of the cutting blade 18a. With this configuration, the chip-like electronic component 13 in a cavity 12 of the carrier tape 11 is brought into a state where its upper surface is restrained on the guide surface 19a of the component guide 19 when the top tape 14 is peeled from the carrier tape 11, and thus, the small chip-like electronic component 13 can be prevented from popping up, being changed in posture and being pinched. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种适用于馈送芯片状电子部件的带包装部件供给器和带包装部件供给方法。胶带包装部件供给器10具有用于间歇地传送载带11的带转发装置和顶带卷绕装置。在给料器10中，切割刀片18a设置在从托带11剥离顶部带14的位置并且与顶部带14的厚度尺寸不同的位置处，多个带子压紧装置17设置在剥离顶部带14的位置P1和部件引导件19设置在与切割刀片18a的切割轨道上的顶部带14的厚度尺寸不同的位置处。利用这种构造，当载带11的空腔12中的芯片状电子部件13被上表面被限制在部件引导件19的引导表面19a上时，当顶部带14从载带11，因此能够防止小片状电子部件13弹起，姿势变化，被夹持。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2006286913A Circuit module and manufacturing method thereof 审中-公开
标题翻译：电路模块及其制造方法
公开(公告)号：JP2006286913A
公开(公告)日：2006-10-19
申请号：JP2005104537
申请日：2005-03-31
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： YUASA MINORU , KAI TAKEHIKO , MUGITANI HIDEJI , TSUNODA ATSUSHI
IPC分类号： H01L21/56
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit module for providing a highly reliable circuit module.
SOLUTION: The circuit module (101) is manufactured by forming a sealing resin layer (109) for sealing a relevant electronic component group to a circuit substrate (107) respectively, comprising an external terminal group (103) in the thickness of t at a connecting surface (107b) and the electronic component group (105) at the mounting surface (107a). In more concrete, an upper die (3) including an upper cavity, and a metal die (31) including a lower die including a lower cavity (5) opposing to the upper cavity are prepared. Moreover, a buffer sheet (51)of the shape and the thickness T (≥t) enabling placement of a relevant external terminal group on the upper surface is laid at the bottom surface of the relevant lower cavity. Pressurized entry of molten resin into a gap between the buffer sheet and the metal die can be prevented effectively on the occasion of fulfillment of the resin. Consequently, generation of burrs of resin can be prevented. As a result, highly reliable circuit module can be manufactured.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供用于提供高可靠性电路模块的电路模块的制造方法。解决方案：电路模块（101）通过形成用于将相关的电子部件组分别密封到电路基板（107）的密封树脂层（109）来制造，该密封树脂层包括厚度为在安装表面（107a）处的连接表面（107b）和电子部件组（105）处。更具体地，准备包括上腔的上模3和包括下模的金属模31，金模（31）包括与上腔相对的下腔（5）。此外，在相关下腔的底面放置形状和厚度T（≥t）的缓冲片（51），使得能够在上表面上放置相关的外部端子组。在实现树脂的情况下，可以有效地防止熔融树脂进入缓冲片和金属模之间的间隙。因此，可以防止产生树脂毛刺。结果，可以制造高可靠性的电路模块。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2008042152A Circuit module and manufacturing method therefor 有权
标题翻译：电路模块及其制造方法
公开(公告)号：JP2008042152A
公开(公告)日：2008-02-21
申请号：JP2006238242
申请日：2006-08-07
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： SHIMAMURA MASAYA , YUASA MINORU , KAI TAKEHIKO
IPC分类号： H01L21/56 , H01L23/00 , H01L23/29 , H01L23/31
CPC分类号： H01L24/97 , H01L23/552 , H01L2224/48227 , H01L2224/97 , H01L2924/01029 , H01L2924/1531 , H01L2924/15787 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a circuit module of which no gap occurs at the border between a substrate and shielding layer, at an end surface. SOLUTION: The method of manufacturing the circuit module includes a process in which a plurality of components 13 are arranged on a substrate 11, a process in which an insulating layer 15 for covering the components is formed, a process in which a shielding layer 17 made of conductive resin that covers the insulating layer is formed, and a process in which the substrate where the shield layer is formed is divided. Before the shielding layer 17 is formed, a groove 16, of which the width W2 at a tip part 16a is narrower than width W1 of a base end part 16b in the depth direction, is formed at least at the insulating layer 15, in advance. A conductive resin is so applied as to fill at least the groove, so as to form the shielding layer, which is ground by width W3 that is larger than the width at the tip part, but is smaller than that at the base end part, along the tip of the groove, and thus dividing the substrate. Thus, at the end face of the circuit module, the lower end at the edge of the shielding layer that covers the insulating layer is adhered tightly to the inner surface of the groove facing it, providing a circuit module which is hard to be affected by external electromagnetic fields or static electricity. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供在端面处在基板和屏蔽层之间的边界处不发生间隙的电路模块。解决方案：制造电路模块的方法包括在基板11上布置多个部件13的工艺，其中形成用于覆盖部件的绝缘层15的工艺，其中屏蔽形成覆盖绝缘层的由导电树脂制成的层17，并且划分形成屏蔽层的基板的工序。在形成屏蔽层17之前，至少在绝缘层15上形成有尖端部16a的宽度W2比基端部16b的深度方向的宽度W1窄的槽16 。为了形成屏蔽层，通过宽度W3比前端部宽度大，但比基端部的宽度小的方式形成屏蔽层，所以施加导电性树脂至少填充沟槽，沿着槽的尖端，从而划分衬底。因此，在电路模块的端面，覆盖绝缘层的屏蔽层的边缘的下端紧密地粘附在面向其的槽的内表面上，提供难以受到影响的电路模块外部电磁场或静电。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2008022016A Circuit module 审中-公开
标题翻译：电路模块
公开(公告)号：JP2008022016A
公开(公告)日：2008-01-31
申请号：JP2007196473
申请日：2007-07-27
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： MUGITANI HIDEJI , KAI TAKEHIKO , YUASA MINORU
IPC分类号： H01L23/29 , H01L23/31 , H05K3/28
CPC分类号： H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105
摘要： PROBLEM TO BE SOLVED: To provide a circuit module in which solder fillet of an electronic component can be prevented from melting through reflow to cause short circuit.
SOLUTION: The circuit module 1 is provided with a first resin 7 covering from a land electrode on a circuit board 3 to the solder fillet 5 connecting the electronic component 21 on the mounting surface 3a and interposing between the electronic component 21 and the mounting surface 3a, a second resin 9 covering at least the upper surface of the first resin part 7 and the electronic component 21 connected through the solder fillet 5. The first resin 7 serves to prevent short circuit even if the solder fillet 5 melts through reflow.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种电路模块，其中电子部件的焊盘可以通过回流熔化而引起短路。解决方案：电路模块1设置有第一树脂7，其从电路板3上的焊盘电极覆盖到连接安装表面3a上的电子部件21并插入在电子部件21和电子部件21之间的焊接圆角5 安装表面3a，至少覆盖第一树脂部分7的上表面的第二树脂9和通过焊接圆角5连接的电子部件21.第一树脂7用于防止短路，即使焊接焊缝5通过回流熔化。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2006286915A Circuit module 审中-公开
标题翻译：电路模块
公开(公告)号：JP2006286915A
公开(公告)日：2006-10-19
申请号：JP2005104545
申请日：2005-03-31
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： KAI TAKEHIKO , YUASA MINORU , MUGITANI HIDEJI , SAKURAI TATSUYA
IPC分类号： H05K9/00 , H01L23/00 , H05K3/28
CPC分类号： H01L24/97 , H01L2924/15787 , H01L2924/19105 , H01L2924/3025 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a circuit module which offers a noise shield effect matching that of a metal case when electronic components sealed in an insulating resin layer are sheathed with a conductive resin layer overlaid on the insulating resin layer. SOLUTION: The circuit module includes a circuit board (7) having a wiring pattern (5) and a ground layer (8), a group of electronic components (9) mounted on the mounting surface of the circuit board (7), the insulating resin layer (15) sealing the electronic components (9), and the conductive resin layer (19) which is formed on the surface of the insulating resin layer (15) and contains flakes of metal. The conductive resin layer (19) works to offer the noise shield effect matching that of the metal case. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种电路模块，其在密封在绝缘树脂层中的电子部件用覆盖在绝缘树脂层上的导电树脂层覆盖时，提供与金属壳体相匹配的噪声屏蔽效果。解决方案：电路模块包括具有布线图案（5）和接地层（8）的电路板（7），安装在电路板（7）的安装表面上的一组电子部件（9）密封电子部件（9）的绝缘树脂层（15）和在绝缘树脂层（15）的表面上形成的含有金属片的导电性树脂层（19）。导电树脂层（19）用于提供与金属外壳相匹配的噪音屏蔽效果。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2003008298A Dummy chip for evaluating packaging accuracy, and method for evaluating packaging accuracy using the same 审中-公开
标题翻译：用于评估包装精度的DUMMY芯片和使用其评估包装精度的方法
公开(公告)号：JP2003008298A
公开(公告)日：2003-01-10
申请号：JP2001194196
申请日：2001-06-27
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： OSHIMA GOSUKE , YUASA MINORU
IPC分类号： H05K13/04
摘要： PROBLEM TO BE SOLVED: To provide a dummy chip, for accurately evaluating the packaging accuracy of a system for packaging a chip component on a substrate, or the like. SOLUTION: Since each of dummy chips 31, 41 is a next quadrangular prism, having no irregularities on the surface and the individual shape is stabilized, the effect of the variations in the shape of the dummy chip 31, 41 on the suction of a component in the packaging process is suppressed at trial packaging. That effect on the detection of the center of gravity of the chip component is also suppressed in the evaluation process and packaging accuracy of a packaging system can be evaluated accurately.
摘要翻译：要解决的问题：提供一种用于精确评估用于在基板上包装芯片部件的系统的封装精度的虚拟芯片等。解决方案：由于虚拟芯片31,41中的每一个是下一个四边形棱镜，所以在表面上没有不规则性和个体形状稳定，虚拟芯片31,41的形状的变化对部件的吸力的影响在包装过程中被试用包装压制。在评估过程中也抑制了对芯片部件的重心的检测的影响，并且可以准确地评估包装系统的包装精度。

10. 发明专利

JP2004014871A Circuit module and its producing method 有权
公开(公告)号：JP2004014871A
公开(公告)日：2004-01-15
申请号：JP2002167593
申请日：2002-06-07
申请人： Taiyo Yuden Co Ltd , 太陽誘電株式会社
发明人： MUGITANI HIDEJI , KAI TAKEHIKO , YUASA MINORU
IPC分类号： H01L23/29 , H01L23/31 , H01L25/04 , H01L25/18
摘要： PROBLEM TO BE SOLVED: To provide a circuit module in which chipping, adverse effect on an electronic component and falling thereof are prevented by coating a collective circuit board for mounting the electronic components with resin.
SOLUTION: An X axis cutting line and a Y axis cutting line of a circuit board (101) collecting circuit modules (1) mounting electronic components (21) are coated with first resin. The resin flows on the collective circuit board (101), and permeates between each electronic component (21) and the collective circuit board (101), thus preventing short circuit due to melting of solder through reflow. On the other hand, when the circuit board is cut along the cutting line filled with the first resin, the first resin functions as a buffer material and prevents chipping due to impact of cutting. Since chipping, adverse effect on the electronic component and falling thereof are prevented, occurrence of failed product is suppressed, thus contributing to sustain high quality of the circuit module.
COPYRIGHT: (C)2004,JPO

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