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    • 2. 发明专利
    • Address allocation device and router
    • 地址分配设备和路由器
    • JP2003273891A
    • 2003-09-26
    • JP2002076656
    • 2002-03-19
    • Sumitomo Electric Networks Inc住友電工ネットワークス株式会社
    • MATSUDA YOSHINORIYAMASHITA MASATOSHI
    • H04L12/46H04L12/66H04L29/12
    • H04L29/12367H04L61/2514
    • PROBLEM TO BE SOLVED: To provide an NAT router which can conduct suitable communication, even when an application for writing IP address information in a data part of an IP packet is conducted. SOLUTION: The NAT router 100 assigns the same address as a public IP address (B) allocated to a global interface of the router to one computer 400a, connected to an internal network. The router 100 assigns the same address as a public IP address (A) of a host UP unit 200 and a designated private IP address (X) in a local interface. Thus, even if the IP packet, in which the public IP address in written in the data part, is sent from an external network to the internal network, proper communication can be conducted. COPYRIGHT: (C)2003,JPO
    • 要解决的问题:即使在IP分组的数据部分中写入IP地址信息的应用时,也可以提供能够进行适当通信的NAT路由器。 解决方案:NAT路由器100将分配给路由器的全局接口的公共IP地址(B)分配给与连接到内部网络的一台计算机400a相同的地址。 路由器100在本地接口中分配与主机UP单元200的公共IP地址(A)和指定的专用IP地址(X)相同的地址。 因此,即使将写入数据部分的公共IP地址从外部网络发送到内部网络的IP分组,也可以进行适当的通信。 版权所有(C)2003,JPO
    • 3. 发明专利
    • Video receiver
    • 视频接收器
    • JP2013078127A
    • 2013-04-25
    • JP2012258415
    • 2012-11-27
    • Sumitomo Electric Ind Ltd住友電気工業株式会社Sumitomo Electric Networks Inc住友電工ネットワークス株式会社
    • TAKASHIMA TOSHIHIROMATSUDA YOSHINORI
    • H04N7/173H04L7/00
    • PROBLEM TO BE SOLVED: To provide a video receiver which can prevent the start of decoding from being delayed even if a bit rate is low.SOLUTION: A video receiver 4 includes: a buffer memory 11 for temporarily storing a transport stream S1 including a plurality of transport packets TP to which time stamps 50 are attached; VCO 18 for generating a reference clock; a TTS counter 16 for performing a count operation in response to the reference clock; a TTS gate 12 for controlling output of the transport packets TP from the buffer memory 11 in response to values of the time stamps 50 attached to the transport packets TP and a count value of the TTS counter 16; and an adjusting section 17 for adjusting a frequency of the reference clock in response to residence time of the transport packet TP inputted to the buffer memory 11.
    • 要解决的问题:即使比特率低,也可以提供可以防止解码开始延迟的视频接收机。 解决方案:视频接收机4包括:缓冲存储器11,用于临时存储包括附加时间戳50的多个传输分组TP的传输流S1; 用于产生参考时钟的VCO18; TTS计数器16,用于响应于参考时钟执行计数操作; TTS门12,用于响应于附加到传输分组TP的时间标记50的值和TTS计数器16的计数值来控制来自缓冲存储器11的传输分组TP的输出; 以及调整部分17,用于响应于输入到缓冲存储器11的传输分组TP的停留时间来调整参考时钟的频率。(C)2013,JPO和INPIT
    • 4. 发明专利
    • Image receiver
    • 图像接收器
    • JP2012160798A
    • 2012-08-23
    • JP2011017491
    • 2011-01-31
    • Sumitomo Electric Ind LtdSumitomo Electric Networks Inc住友電工ネットワークス株式会社住友電気工業株式会社
    • TAKASHIMA TOSHIHIROMATSUDA YOSHINORI
    • H04N7/173H04L7/02
    • PROBLEM TO BE SOLVED: To provide an image receiver capable of avoiding the delay of start of decoding even when a bit rate is low.SOLUTION: An image receiver 4 includes: a buffer memory 11 for temporarily storing a transport stream S1 including multiple transport packets TP to which time stamps 50 are respectively added; a voltage control oscillator (VCO) 18 for generating a reference clock; a time-stamped transport stream (TTS) counter 16 for performing a count operation, based on the reference clock; a TTS gate 12 for controlling the outputs of the respective transport packets TP from the buffer memory 11, based on the values of the time stamps 50 added to the respective transport packets TP and the count value of the TTS counter 16; and an adjustment part 17 for adjusting the frequency of the reference clock, based on the residence time of the transport packets TP input to the buffer memory 11.
    • 要解决的问题:提供即使当比特率低时也能够避免解码开始延迟的图像接收机。 解决方案:图像接收器4包括:缓冲存储器11,用于临时存储包括多个传送分组TP的传输流S1,时间标记50分别附加到传输分组TP; 用于产生参考时钟的压控振荡器(VCO)18; 用于基于参考时钟执行计数操作的时间戳传输流(TTS)计数器16; TTS门12,用于根据添加到各个传输分组TP的时间标记50和TTS计数器16的计数值来控制来自缓冲存储器11的各传输分组TP的输出; 以及用于基于输入到缓冲存储器11的传输分组TP的停留时间来调整参考时钟的频率的调整部分17.版权所有(C)2012,JPO&INPIT