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    • 1. 发明专利
    • Image pickup element package and image pickup device
    • 图像拾取元件包和图像拾取器件
    • JP2013222772A
    • 2013-10-28
    • JP2012092386
    • 2012-04-13
    • Sony Corpソニー株式会社
    • YAMAGUCHI MASANORI
    • H01L27/14H04N5/225H04N5/335
    • PROBLEM TO BE SOLVED: To facilitate operation of attaching a lens holder having a lens to an image pickup element package accommodating an image pickup element for an image pickup device.SOLUTION: An image pickup element package accommodates an image pickup element having a light-receiving surface receiving incident light, and includes a substrate on which the image pickup element and a frame are disposed. The image pickup element is fixed to the substrate on a surface opposite to the light-receiving surface of the image pickup element. The frame has screw holes to fix a lens holder, and is connected to the substrate so as to surround the periphery of the image pickup element.
    • 要解决的问题:为了便于将具有透镜的透镜保持器附接到容纳用于图像拾取装置的图像拾取元件的图像拾取元件封装的操作。解决方案:图像拾取元件封装容纳具有光接收的图像拾取元件 表面接收入射光,并且包括其上设置有图像拾取元件和框架的基板。 图像拾取元件在与图像拾取元件的光接收表面相对的表面上固定到基板。 框架具有用于固定透镜保持器的螺钉孔,并且连接到基板以围绕图像拾取元件的周边。
    • 2. 发明专利
    • Display device
    • 显示设备
    • JP2007025544A
    • 2007-02-01
    • JP2005211177
    • 2005-07-21
    • Sony Corpソニー株式会社
    • WATANABE KATSUHIDEYAMAGUCHI MASANORIINO MASUMITSUYUMOTO AKIRAASANO SHINJINDA SEIICHIROFUJIMURA HIROSHI
    • G09G3/30G09G3/20H01L51/50
    • PROBLEM TO BE SOLVED: To provide a display device which prevents luminance variation in high luminance and does not spoil signal writing responsiveness in low luminance. SOLUTION: A pixel circuit 101 includes a TFT 111, an organic EL light emitting element 113, a TFT 112 connected between a signal line SGL and a gate of the TFT 111 and a capacitor C 111 connected to a node ND 111, and also has a line memory part 312 and a field memory part 311 for exchanging display data within one field period. N bit (N-th power tone of 2) display is allowed by providing one field period with N pieces of subfield SF periods, a scan driver generates N pieces of subfield signals, when the scan driver performs selection, a signal at high or low level is impressed from a data driver including a selector switch part 1032 to the signal line SGL, and incorporation of the signal in pixels is performed at that timing. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种防止高亮度的亮度变化并且不会在低亮度下破坏信号写入响应性的显示装置。 解决方案:像素电路101包括TFT 111,有机EL发光元件113,连接在信号线SGL和TFT 111的栅极之间的TFT 112和连接到节点ND 111的电容器C 111, 并且还具有用于在一个场周期内交换显示数据的行存储器部分312和场存储器部分311。 通过为N个子场SF周期提供一个场周期来允许N位(N次方的色调2)显示,扫描驱动器产生N个子场信号,当扫描驱动器执行选择时,高或低的信号 从包括选择器开关部1032的数据驱动器向信号线SGL施加的电平,并且在该定时执行信号在像素中的并入。 版权所有(C)2007,JPO&INPIT
    • 4. 发明专利
    • Imaging apparatus
    • 成像设备
    • JP2007202215A
    • 2007-08-09
    • JP2007122245
    • 2007-05-07
    • Sony Corpソニー株式会社
    • YAMAGUCHI MASANORI
    • H04N9/07
    • PROBLEM TO BE SOLVED: To display an imaging output even without providing a VRAM when a full-scan type imaging device is included.
      SOLUTION: An imaging device 101 is operated in a thinning mode, an imaging signal is supplied to a liquid crystal display 135, and a picked-up image is displayed (monitoring mode). The imaging device is operated in a full-scan mode and data are written in a DRAM 141 (first recording mode). After the end of writing, data compressed by an encoder/decoder 142 are written in a flash memory 143, and an imaging signal is displayed (second recording mode). The flash memory 143 is read, data are decoded and written in the DRAM 141, and an imaging signal is displayed (first reproducing mode). Data are thinned and read from the DRAM 141 and displayed (second reproducing mode). Switching of these modes is controlled by a data switcher 130 and a microcomputer 105.
      COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:即使在包括全扫描型成像装置的情况下,即使不提供VRAM也可以显示成像输出。 解决方案:成像装置101以间隔模式操作,将成像信号提供给液晶显示器135,并且显示拍摄图像(监视模式)。 成像装置以全扫描模式操作,并且数据被写入DRAM 141(第一记录模式)。 在写入结束之后,由编码器/解码器142压缩的数据被写入快闪存储器143中,并且显示成像信号(第二记录模式)。 读取闪速存储器143,将数据解码并写入DRAM 141,并显示成像信号(第一再现模式)。 数据被稀疏并从DRAM 141读取并显示(第二再现模式)。 这些模式的切换由数据切换器130和微型计算机105控制。版权所有:(C)2007,JPO&INPIT
    • 6. 发明专利
    • Pixel circuit, display device, and driving method of pixel circuit
    • 像素电路,显示设备和像素电路的驱动方法
    • JP2007003706A
    • 2007-01-11
    • JP2005182226
    • 2005-06-22
    • Sony Corpソニー株式会社
    • INO MASUMITSUYUMOTO AKIRAASANO SHINJINDA SEIICHIROFUJIMURA HIROSHIYAMAGUCHI MASANORIWATANABE KATSUHIDE
    • G09G3/30G09G3/20H01L51/50
    • PROBLEM TO BE SOLVED: To provide a pixel circuit that can prevent variance in luminance during high-luminance display without impairing signal write response during low-luminance display, and to provide a display device and a driving method of the pixel circuit. SOLUTION: The pixel circuit 101 includes a TFT 111 and an organic EL light emitting element 113 arranged in series between a power source potential line VCCL and a reference potential GND, a TFT 112 connected between a signal line SGL and the gate of the TFT 111, and a capacitor C111 connected between the gate of the TFT 111 and the power source potential line VCCL. A one-field period is provided with N (8 or 10) sub-field SF periods to perform N-bit (2 N gray scale) display, and a scan driver 104 generates signals of the N subfields SF1 to SFN; when the scan driver 104 preforms the selection, a high-level or low-level signal is applied from a data driver 103 to a signal line SGL and the signals are input to pixels in the timing. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种能够防止在高亮度显示期间亮度变化而不损害低亮度显示期间的信号写入响应的像素电路,并提供像素电路的显示装置和驱动方法。 解决方案:像素电路101包括串联布置在电源电位线VCCL和基准电位GND之间的TFT 111和有机EL发光元件113,连接在信号线SGL与栅极之间的TFT 112 TFT 111和连接在TFT111的栅极和电源电位线VCCL之间的电容器C111。 具有N(8或10)个子场SF周期以进行N位(2 N 灰度)显示的单场周期,扫描驱动器104产生N个子场的信号 SF1至SFN; 当扫描驱动器104进行选择时,从数据驱动器103向信号线SGL施加高电平或低电平信号,并且在定时中将信号输入到像素。 版权所有(C)2007,JPO&INPIT
    • 9. 发明专利
    • Flat display device
    • 平面显示设备
    • JP2005300866A
    • 2005-10-27
    • JP2004116046
    • 2004-04-09
    • Sony Corpソニー株式会社
    • YAMAGUCHI MASANORI
    • H01L51/50G09G3/20G09G3/30H05B33/14
    • PROBLEM TO BE SOLVED: To precisely adjust colors with simple constitution by applying a flat display device to a display device using, for example, organic EL elements and coping with product variation in light emission characteristics etc. SOLUTION: Original reference voltages for black level and white level are generated according to original reference voltage setting data for black level and white level and then divided by resistances to generate a reference voltage for analog-to-digital conversion; and those original reference voltage setting data for black level and white level are modulated according to correction data and original reference voltages for black level and white level are set with resolution below the resolution of those original reference voltage setting data by using spatial and temporal integration effects of a display part. COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:通过使用例如有机EL元件将平板显示装置应用到显示装置并且应对产品的发光特性等变化,来以简单的结构精确地调整颜色。解决方案:原稿 根据黑电平和白电平的原始参考电压设置数据生成黑电平和白电平的参考电压,然后用电阻除以产生用于模数转换的参考电压; 并且根据校正数据调制用于黑电平和白电平的那些原始参考电压设置数据,并且通过使用空间和时间积分效应将分辨率设置为低于那些原始参考电压设置数据的分辨率的黑电平和白电平的原始参考电压 的显示部分。 版权所有(C)2006,JPO&NCIPI
    • 10. 发明专利
    • Driving circuit of flat display device and flat display device
    • 平面显示设备和平面显示设备的驱动电路
    • JP2005300784A
    • 2005-10-27
    • JP2004114728
    • 2004-04-08
    • Sony Corpソニー株式会社
    • YAMAGUCHI MASANORI
    • H01L51/50G09G3/20G09G3/30G09G3/32G09G3/36H03K17/00H03M1/66H05B33/08H05B33/14
    • G09G3/3685G09G3/2003G09G3/3208G09G3/3614G09G3/3696G09G2310/027G09G2310/0297G09G2320/0666G09G2320/0673G09G2330/028
    • PROBLEM TO BE SOLVED: To precisely adjust colors with simple constitution by applying a driving circuit of a flat display device to a display device which uses, for example, organic EL elements and making it possible to variously correct light emission characteristics. SOLUTION: Original reference voltages VRT, VA to VG, and VRB are generated by selecting a plurality of candidate voltages by voltage dividing circuits 72A, 32B to 32G, and 72H according to original reference voltage setting data DV and reference voltages V1 to V64 for digital-to-analog conversion are generated from the original reference voltages VRT, V1 to V6, and VRB. For the original reference voltages VRT and VRB at both the ends, voltages of generation reference VRT-T, VRT-B, VRB-T, and VRB-B are varied with data DVVRT-A and DVVRB-A for rough adjustment and for the remaining reference voltages VA to VG, the voltage dividing circuits 32B to 32G are connected in series to generate them based upon the original reference voltages VRT and VRB at both the ends. COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:通过将平面显示装置的驱动电路应用于使用例如有机EL元件的显示装置并且可以进行各种校正发光特性,通过简单的构成来精确地调整颜色。 解决方案:通过根据原始参考电压设置数据DV和参考电压V1至32分别通过分压电路72A,32B至32G和72H选择多个候选电压来产生原始参考电压VRT,VA至VG和VRB 用于数模转换的V64从原始参考电压VRT,V1至V6和VRB产生。 对于两端的原始参考电压VRT和VRB,产生参考VRT-T,VRT-B,VRB-T和VRB-B的电压随数据DVVRT-A和DVVRB-A而变化,用于粗调 剩余的参考电压VA至VG,分压电路32B至32G串联连接,以便根据两端的原始参考电压VRT和VRB产生它们。 版权所有(C)2006,JPO&NCIPI