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1. 发明专利

JP2006049732A Manufacturing method and manufacturing apparatus of semiconductor package 审中-公开
标题翻译：半导体封装的制造方法和制造设备
公开(公告)号：JP2006049732A
公开(公告)日：2006-02-16
申请号：JP2004231802
申请日：2004-08-09
申请人： Sony Corp , ソニー株式会社
发明人： KUSANO HIDETOSHI , KANAYAMA FUJIO , FUKUYA KENICHI
IPC分类号： H01L23/36
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method and a manufacturing apparatus of a semiconductor package wherein heat dissipation members are arranged on a semiconductor device with a constant distance, while equalizing a distance to a facing surface of the heat dissipation members over the whole region of a top face of the semiconductor device.
SOLUTION: The manufacturing method and the manufacturing apparatus of a semiconductor package 10 are disclosed. The package bonds and fixes heat dissipation members 13 on a semiconductor device 11 in the state of overlying the semiconductor device 11 loaded on a circuit board 12. A method of manufacturing the semiconductor package comprises a first step of pulling out the top face of the semiconductor device 11 and the facing surface of the heat dissipation members 13 in parallel, and fixing the top face of the semiconductor device 11 and the facing surface of the heat dissipation members 13 with an inclination to be parallel; a second step of making a space between the semiconductor device 11 and the heat dissipation members 13 in the state of maintaining the inclination to be parallel to form a bonding layer 14 on the semiconductor device 11; and a third step of arranging the heat dissipation members 13 on the semiconductor device 11 through the bonding layer 14, in the state of maintaining the inclination to be parallel to fix the heat dissipation members 13 on the semiconductor device 11.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供半导体封装的制造方法和制造装置，其中散热构件布置在具有恒定距离的半导体器件上，同时平衡到散热构件的相对表面的距离，半导体器件的顶面的整个区域。解决方案：公开了半导体封装10的制造方法和制造装置。该封装在半导体器件11上的半导体器件11的上方覆盖半导体器件11的状态下结合并固定散热构件13.半导体封装的制造方法包括：将半导体的顶面拉出的第一步骤装置11和散热构件13的相对表面并联，并且将半导体装置11的顶面和散热构件13的相对表面以倾斜平行的方式固定; 在保持倾斜平行的状态下在半导体器件11上形成接合层14的状态下，在半导体器件11和散热部件13之间形成空间的第二步骤; 以及在保持倾斜平行的状态下将散热构件13固定在半导体装置11上的状态下，通过接合层14将散热构件13布置在半导体器件11上的第三步骤。版权所有：（C）2006，JPO＆NCIPI

2. 发明专利

JP2005026631A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005026631A
公开(公告)日：2005-01-27
申请号：JP2003270881
申请日：2003-07-04
申请人： Sony Corp , ソニー株式会社
发明人： KUSANO HIDETOSHI , NAKAJO ATSUSHI
IPC分类号： H01L23/12 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L25/0657 , H01L2224/73257 , H01L2225/06568
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is thin and excellent in the dimensional stability of a conductor pattern, and to provide a method for manufacturing the same.
SOLUTION: The method for manufacturing the semiconductor device includes a step of forming the conductor patterns 4 by a pattern plating method on one surface of a conductive release material; a step of connecting the conductor pattern 4 to a semiconductor chip 6, a step of burying between the conductor patterns 4, and forming an insulating resin material 8 on one surface of the release material so as to cover at least a connecting part of the conductor pattern 4 to the semiconductor chip 6; and a step of releasing the release material from the conductor pattern 4, and exposing the opposite surface of the connecting surface of the conductor pattern 4 to the semiconductor chip 6.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种导体图案的尺寸稳定性薄且优异的半导体器件，并提供其制造方法。解决方案：制造半导体器件的方法包括通过图案电镀方法在导电性剥离材料的一个表面上形成导体图案4的步骤; 将导体图案4连接到半导体芯片6的步骤，在导体图案4之间进行掩埋的步骤，并且在剥离材料的一个表面上形成绝缘树脂材料8，以至少覆盖导体的连接部分图案4到半导体芯片6; 以及从导体图案4释放释放材料的步骤，并将导体图案4的连接表面的相对表面暴露于半导体芯片6.版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2005005435A Mounting substrate and its manufacturing method 审中-公开
标题翻译：安装基板及其制造方法
公开(公告)号：JP2005005435A
公开(公告)日：2005-01-06
申请号：JP2003166347
申请日：2003-06-11
申请人： Sony Corp , ソニー株式会社
发明人： INOYAE HIDEKO , ORUI KEN , NISHITANI YUJI , KUSANO HIDETOSHI , ASAMI HIROSHI
IPC分类号： H05K3/28 , H01L23/12 , H05K1/14 , H05K1/18 , H05K3/20
CPC分类号： H01L2224/16225
摘要： PROBLEM TO BE SOLVED: To provide a thin mounting substrate also having excellent dimensional stability, and a manufacturing method for the substrate. SOLUTION: The mounting substrate has a process in which a conductor pattern 12 is formed on one surface of a transfer sheet 10, a process in which an air gap 16 is formed at an insulating layer 14, a process in which the sheet 10 and the layer 14 are laminated with each other so as to hold the pattern 12 and the sheet 10 is removed, a process in which an element 17 is housed in the air gap 16 while being electrically connected to the pattern 12, and a process in which external terminals 22 electrically connected to the element 17 are joined with the reverse surface of the connecting surface of the element 17 in the pattern 12. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供具有优异的尺寸稳定性的薄的安装基板以及用于基板的制造方法。解决方案：安装基板具有在转印纸10的一个表面上形成导体图案12的工艺，其中在绝缘层14处形成气隙16的工艺，其中片材 10并且层14彼此层叠以便保持图案12并且去除片材10，其中元件17容纳在气隙16中同时电连接到图案12的过程，以及处理其中电连接到元件17的外部端子22以图案12与元件17的连接表面的相反表面接合。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004338064A Abrasive belt, polishing device and polishing method 审中-公开
公开(公告)号：JP2004338064A
公开(公告)日：2004-12-02
申请号：JP2003140322
申请日：2003-05-19
申请人： Sony Corp , ソニー株式会社
发明人： IWASHITA TAKESHI , ASAMI HIROSHI , KUSANO HIDETOSHI
IPC分类号： B24B21/04 , B24D3/00 , B24D3/28 , B24D11/06
摘要： PROBLEM TO BE SOLVED: To provide an abrasive belt with a long service life capable of performing flat and smooth polishing of a substrate surface while suppressing the formation of level difference on a polished surface and causing no warp. SOLUTION: In this abrasive belt 1 brought into sliding contact with the substrate while rotating and traveling, to polish the surface of the substrate, an abrasive layer 6 for polishing the surface of the substrate is formed by applying paste formed by mixing cork 3, abrasive grains 4 and bonding resin 5, onto a belt base material 2 and drying it. With this abrasive belt 1, the cork 3 serves as a cushion to polish in soft finish without flaw in comparison with polishing with an abrasive belt having an abrasive layer only with abrasive grains. Furthermore, the mixed cork 3 allows the abrasive belt 1 to follow the unevenness on the substrate surface, which permits flat and smooth polishing over the whole substrate surface. COPYRIGHT: (C)2005,JPO&NCIPI

5. 发明专利

JP2004022733A Polishing apparatus for wiring board, polishing method, and multilayer wiring board 审中-公开
公开(公告)号：JP2004022733A
公开(公告)日：2004-01-22
申请号：JP2002174358
申请日：2002-06-14
申请人： Sony Corp , ソニー株式会社
发明人： MAKINO HARUHIKO , IWASHITA TAKESHI , KUSANO HIDETOSHI
IPC分类号： B24B21/08 , H05K3/00 , H05K3/26 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a polishing apparatus and a polishing method, whereby a warped wiring board can be polished uniformly in the thickness direction, and to provide a multi-layer wiring board comprising polished wiring boards that are stacked. SOLUTION: A lower damper member 41 provided with a porous copper plate 44 is fitted onto a vacuum chuck 13 of a movable table 11, and a wiring board P is chucked on the copper plate 44 with its polished face up. A polishing belt 21 is placed on the polished face so that the abrasive grain face of the belt 21 is in contact with the polished face; the polishing belt 21 is moved in the x directions, while a pusher 31 presses against the rear side of the polishing belt 21 via a fluororesin sheet 32 and an upper damper member 42; the movable table 11 is reciprocated in the y directions; and the pusher 31 is made to reciprocate in the x directions to uniformly polish the warped wiring board P in the thickness direction. In this way, a smooth multilayer wiring board 50 is obtained by stacking the polished wiring boards P. COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2003037207A Electronic component mounting board and method of manufacturing the same 审中-公开
标题翻译：电子元件安装板及其制造方法
公开(公告)号：JP2003037207A
公开(公告)日：2003-02-07
申请号：JP2001223379
申请日：2001-07-24
申请人： Sony Corp , ソニー株式会社
发明人： IWASHITA TAKESHI , MAKINO HARUHIKO , KUSANO HIDETOSHI
IPC分类号： H05K3/06 , H01L23/12 , H05K3/24
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To enable formation of an electrostatic capacity within a board and use of part of the board as an electrostatic capacity, by devising a method of forming a counter electrode and a storage electrode. SOLUTION: The board includes an insulating carrier member 22 having a desired dielectric constant, a flat electrode 21 provided one surface of the carrier member 22 and having a predetermined broadness or area, and a predetermined circuit wiring electrode 13 mounted on the other side of the carrier member 22. The circuit wiring electrode 13 is formed by plating a platable or etchable conductive base material with a conductive member, with the use of a non-plating member selectively formed as a mask and then selectively etching and removing the base material. An electrostatic capacitance C of a series connection type carried a part of the carrier member 22 as a dielectric film can be pinched between the flat electrode 21 and the circuit wiring electrode 13. In addition, when compared with a wiring pattern formed by etching a copper foil, an electrode with a side edge, having a predetermined thickness vertically erected, can be formed.
摘要翻译：要解决的问题：通过设计形成对电极和存储电极的方法，能够在板内形成静电电容并使用板的一部分作为静电电容。解决方案：板包括具有所需介电常数的绝缘载体构件22，设置在载体构件22的一个表面上并具有预定宽度或面积的平坦电极21和安装在载体构件22的另一侧上的预定电路布线电极13 载体构件22.电路布线电极13通过使用选择性地形成为掩模的非镀层构件，然后选择性地蚀刻和去除基底材料，通过用导电构件电镀可镀或可蚀刻的导电基材而形成。承载作为电介质膜的载体构件22的一部分的串联连接类型的静电电容C可以被夹在平面电极21和电路布线电极13之间。此外，当与通过蚀刻铜可以形成具有垂直竖立的预定厚度的具有侧边缘的电极。

7. 发明专利

JP2008066512A Radiator plate manufacturing method 审中-公开
标题翻译：散热板制造方法
公开(公告)号：JP2008066512A
公开(公告)日：2008-03-21
申请号：JP2006242765
申请日：2006-09-07
申请人： Sony Corp , ソニー株式会社
发明人： KUSANO HIDETOSHI , ASAMI YUKIO , MAKIMOTO HIROFUMI
IPC分类号： H01L23/36
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a radiator plate capable of increasing adhesion to a TIM.
SOLUTION: After a nickel plate is formed on the surface of a copper-made lid, a plating solution attached to the lid is washed away with warm water and water attached to the lid is blown away by air blow. Then, the lid is dried for one to three minutes at a temperature of 60 to 80°C.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造能够增加与TIM的附着力的散热板的方法。解决方案：在铜制盖子的表面上形成镍板之后，用温水洗涤附着在盖子上的镀液，通过吹气将附着在盖子上的水吹走。然后，将盖子在60〜80℃的温度下干燥1〜3分钟。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2007335740A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007335740A
公开(公告)日：2007-12-27
申请号：JP2006167624
申请日：2006-06-16
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： KANAYAMA FUJIO , OIDE TOMOSHI , ADACHI MITSURU , NISHITANI YUJI , NIIMI TETSUNAGA , KUSANO HIDETOSHI , SASAKI ATSUO
IPC分类号： H01L23/28 , H01L23/29 , H01L23/31
CPC分类号： H01L2224/16225 , H01L2924/15311 , H01L2924/19106
摘要： PROBLEM TO BE SOLVED: To protect a semiconductor chip in a semiconductor device properly, and to suppress influences received from an environment surrounding the semiconductor chip. SOLUTION: The semiconductor device 10 comprises an underfill 70 charging a gap between a substrate 20 and a semiconductor chip 30, and a sealing resin layer 40 covering a part of the substrate 20. The sealing resin layer 40 has a sealing part 40a for sealing a side face 30a of the semiconductor chip 30 through the underfill 70 projecting to the side face 30a, so that a rear face of the semiconductor chip 30 is exposed from the sealing resin layer 40; and a recess 40c which is provided in the upper region of the underfill 70 projecting to the side face 30a, and is lower than the upper face 40b of the sealing resin layer 40. Thus, a force is decreased in which a filet 70a receives from the sealing resin layer 40, and it is possible to suppress a peeling of the filet 70a contained in the underfill 70 from the semiconductor chip 30. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：适当地保护半导体器件中的半导体芯片，并且抑制从半导体芯片周围的环境接收的影响。解决方案：半导体器件10包括填充衬底20和半导体芯片30之间的间隙的底部填充物70以及覆盖衬底20的一部分的密封树脂层40.密封树脂层40具有密封部40a 用于通过向侧面30a突出的底部填充物70密封半导体芯片30的侧面30a，使得半导体芯片30的背面从密封树脂层40露出; 以及凹部40c，其设置在向侧面30a突出的底部填充物70的上部区域中，并且比密封树脂层40的上表面40b低。因此，压片70a从密封树脂层40，并且可以抑制来自半导体芯片30的底部填充物70中包含的file口70a的剥离。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2007250658A Radiator plate and semiconductor device including the same 有权
标题翻译：包括其的散热板和半导体器件
公开(公告)号：JP2007250658A
公开(公告)日：2007-09-27
申请号：JP2006069464
申请日：2006-03-14
申请人： Sony Corp , ソニー株式会社
发明人： MAKIMOTO HIROFUMI , KUSANO HIDETOSHI , FUKUYA KENICHI , FUJIMARU TOMONORI
IPC分类号： H01L23/36
摘要： PROBLEM TO BE SOLVED: To provide a radiator plate with radiation efficiency further raised therein which is the metallic radiator plate joined to a semiconductor element via a resin for joining, so as to radiate heat generated by the semiconductor element, and to provide a semiconductor device including the radiator plate.
SOLUTION: The radiator plate includes flexible metallic projection pieces by obtaining a sharp-pointed shape at the distal ends on a joint surface to which the semiconductor element is joined via the resin. When the radiator plate is joined to the semiconductor element, the distal end of each projection piece is abutted onto the semiconductor element while bending the projection piece.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种辐射效率进一步升高的散热板，其中通过用于接合的树脂与半导体元件接合的金属散热板，以辐射由半导体元件产生的热量，并提供包括散热板的半导体器件。解决方案：通过在半导体元件经由树脂与其接合的接合表面上的远端处获得尖锐的形状，散热板包括柔性金属突起片。当散热板连接到半导体元件时，每个突出片的远端在突出片弯曲的同时抵靠在半导体元件上。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2006019547A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006019547A
公开(公告)日：2006-01-19
申请号：JP2004196390
申请日：2004-07-02
申请人： Sony Corp , ソニー株式会社
发明人： FUKUYA KENICHI , KUSANO HIDETOSHI , KANAYAMA FUJIO , ASAMI YUKIO
IPC分类号： H01L23/36
摘要： PROBLEM TO BE SOLVED: To control the thickness of thermally conductive resin formed between a semiconductor chip and a lid precisely without lowering the productivity of a semiconductor device having a flip-chip connection structure where the semiconductor chip is covered with the lid.
SOLUTION: In the semiconductor device where a semiconductor chip 2 on a wiring board 1 is covered with a lid 3 and the lid 3 is bonded to the semiconductor chip 2 through thermally conductive resin 4, a resin material 41 mixed with a thermally conductive filler 42 having a function for mediating heat conduction between the semiconductor chip 2 and the lid 3 and a function as a spacer for securing the interval between the semiconductor chip 2 and the lid 3 is employed as the thermally conductive resin 4, and the thickness of the thermally conductive resin 4 is determined by the function as a spacer.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了在不降低半导体芯片被盖覆盖的倒装芯片连接结构的半导体器件的生产率的情况下精确地控制形成在半导体芯片和盖子之间的导热树脂的厚度。解决方案：在布线板1上的半导体芯片2被盖3覆盖并且盖3通过导热树脂4接合到半导体芯片2的半导体器件中，与热作为导热性树脂4，使用具有介导半导体芯片2和盖3之间的导热功能的导电填料42以及用于确保半导体芯片2和盖3之间的间隔的间隔物的功能，的导热性树脂4由作为间隔物的功能决定。版权所有（C）2006，JPO＆NCIPI

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