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    • 1. 发明专利
    • Reproduction device and reproduction method of recording medium
    • 记录介质的再现设备和再现方法
    • JP2008226363A
    • 2008-09-25
    • JP2007063980
    • 2007-03-13
    • Sony Corpソニー株式会社
    • TATENO TATSUYAHAYASHI KENICHI
    • G11B20/14
    • G11B20/10009G11B20/10055G11B2020/1287G11B2220/2537
    • PROBLEM TO BE SOLVED: To provide a reproduction device and reproduction method of a recording medium for improving accuracy in detecting a frame synchronization signal by reliably detecting a synchronization pattern.
      SOLUTION: The device has a first binarization part which binarizes a signal read from the recording medium by PRML processing, a second binarization part which binarizes the signal according to the difference from a predetermined threshold, a first frame synchronization signal detection part which detects the synchronization pattern from a first binarized data string obtained by the first binarization part, and a second frame synchronization signal detection part which detects the synchronization pattern from a second binarized data string obtained by the second binarization part. When the synchronization pattern is not detected by the first frame synchronization signal detection part, a signal detected by the second frame synchronization signal detection part is adopted as the frame synchronization signal.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供一种用于通过可靠地检测同步模式来提高帧同步信号的检测精度的记录介质的再现装置和再现方法。 解决方案:该装置具有将通过PRML处理从记录介质读取的信号二进制化的第一二值化部分,根据与预定阈值的差二进制信号的第二二值化部分,第一帧同步信号检测部分 从由第一二值化部分获得的第一二进制数据串检测同步模式;以及第二帧同步信号检测部,其从由第二二值化部获得的第二二进制数据串检测同步模式。 当第一帧同步信号检测部分未检测到同步模式时,采用由第二帧同步信号检测部分检测的信号作为帧同步信号。 版权所有(C)2008,JPO&INPIT
    • 3. 发明专利
    • Reproducing apparatus and synchronous signal detecting method
    • 重现装置和同步信号检测方法
    • JP2007323765A
    • 2007-12-13
    • JP2006154747
    • 2006-06-02
    • Sony Corpソニー株式会社
    • TATENO TATSUYAHAYASHI KENICHI
    • G11B20/14
    • G11B20/1403G11B20/10009G11B20/10111G11B20/1426G11B2020/1453G11B2220/2541
    • PROBLEM TO BE SOLVED: To provide a synchronous signal detecting method having improved frame synchronism detecting capability capable of surely detecting a synchronous signal, and a reproducing apparatus capable of achieving stable data reproduction. SOLUTION: When synchronous pattern are set as patterns where unique runlengths (9T) are continuous, a pattern appearing in a binary data column obtained by reading from a recording medium is compared with a plurality of types of detection patterns (P1 to P11) each set as a pattern having at least one unique runlength (9T), and when the pattern appearing in the binary data column matches with at least one detection pattern, a synchronous signal is detected. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供一种具有能够可靠地检测同步信号的具有改进的帧同步检测能力的同步信号检测方法和能够实现稳定的数据再现的再现装置。 解决方案:当同步模式被设置为连续的游程长度(9T)的模式时,将通过从记录介质读取而获得的二进制数据列中出现的模式与多种类型的检测模式进行比较(P1至P11 )各自设置为具有至少一个唯一游程长度(9T)的模式,并且当出现在二进制数据列中的模式与至少一个检测模式匹配时,检测到同步信号。 版权所有(C)2008,JPO&INPIT
    • 5. 发明专利
    • AUTOMATIC GAIN CONTROLLER
    • JPH11195942A
    • 1999-07-21
    • JP36106697
    • 1997-12-26
    • SONY CORP
    • HAYASHI KENICHINARAHARA TATSUYA
    • H03G3/30
    • PROBLEM TO BE SOLVED: To provide an automatic gain controller from which an output signal controlled to an optimum level is obtained even when an offset is produced in an input signal. SOLUTION: The automatic gain controller 10 is provided with a gain control amplifier 1 and a feedback circuit consisting of a full wave rectifier 2 applying full wave rectification to an output signal of the gain control amplifier 1, an amplitude error detector 3 that compares the output signal of the full wave rectifier 2 with a prescribed amplitude reference and that outputs the comparison result as an amplitude error signal, and of a control diagonal generating circuit 4 that generates a control signal to the gain control amplifier 1 based on the output signal from the amplitude error detector 3 and that provides an output of it to the gain control amplifier 1. The gain controller 10 is also provided with an offset detection circuit 5 that an absolute value of the offset from the output signal of the gain control amplifier 1, and with an arithmetic circuit 8 that subtracts the output signal of the offset detection circuit from any output signal of the feedback circuit.
    • 6. 发明专利
    • REPRODUCING DEVICE
    • JP2002074859A
    • 2002-03-15
    • JP2000254403
    • 2000-08-24
    • SONY CORP
    • HAYASHI KENICHI
    • G11B20/14
    • PROBLEM TO BE SOLVED: To control a PLL that generates a reproduction clock by detecting a signal defect included in a reproduced signal. SOLUTION: The reproducing device provided with a reproduction clock generating part 18 to generate a reproduction clock synchronized with the frequency of a reproduced signal, a rotation synchronous clock generating part 15 to generate a rotation synchronous clock from a rotation synchronous signal, a deciding part 21 to detect the difference between the frequency of the reproduction clock and the frequency of the rotation synchronous clock, and then to decide whether or not the difference of a detected frequency is within a prescribed range, a first phase signal detecting part 17 to detect a first phase signal, a second phase signal detecting part 19 to detect a second phase signal, and a switching part 20 to switch the first and second phase signals according to the determination of the deciding part 21.
    • 7. 发明专利
    • SIGNAL PROCESSOR
    • JPH11195271A
    • 1999-07-21
    • JP36106797
    • 1997-12-26
    • SONY CORP
    • HAYASHI KENICHINARAHARA TATSUYA
    • G11B20/10
    • PROBLEM TO BE SOLVED: To provide a signal processor capable of preventing the fluctuation of a DC component at the time of offset occurrence. SOLUTION: A signal processor 10 is provided with a maximum value detecting means 1 for detecting the maximum value of the voltage of an input signal, a minimum value detecting means 2 for detecting the minimum value of the voltage of the input signal, a first calculating means 3 for calculating the center value of the voltage of the input signal from the output signals of the maximum and minimum value detecting means 1 and 2, and a second calculating means 4 for subtracting the center value of the voltage calculated by the first calculating means 3 from the input signal and outputting the result thereof. By supplying the input signal and the output signal of the first calculating means 3 to the second calculating means 4, and causing the second calculating means 4 to subtract the center value of the voltage by the first calculating means 3 from the input signal and output the result thereof, a signal obtained by eliminating the fluctuation of the center value from the input signal is outputted.
    • 8. 发明专利
    • METHOD AND DEVICE FOR PROCESSING SIGNAL
    • JPH11191792A
    • 1999-07-13
    • JP35744097
    • 1997-12-25
    • SONY CORP
    • HAYASHI KENICHINARAHARA TATSUYA
    • G11B20/10H04B3/04H04L25/03
    • PROBLEM TO BE SOLVED: To improve performance for suppressing the waveform interference of a signal stream in the state of maintaining the stability of an AGC loop by comparing a level fluctuation value in the signal cycle of the signal sequence with a reference value, averaging the signal level fluctuation of the signal sequence through the adjustment on the preceding step side of an equalizer based on this result and controlling the reference value based on the signal level fluctuation value of an output signal from the equalizer. SOLUTION: In a signal processing circuit 2 of a digital signal recording and reproducing device, a gain is corrected by a first signal level control loop composed of a signal adjuster 21, first low-pass filter(LPF) 41, comparator 45 and third LPF 47 provided on the preceding step side rather than an equalizer 13 to generate signal delay concerning a signal level fluctuation component having jitter fluctuation in the repetition cycle equal with or faster than a frequency having the same repetition cycle as the basic cycle of a regenerative signal yk} in the fluctuation component of the regenerative signal yk}. Thus, even when quick-response gain correction is performed, this gain correction is not made unstable.