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1. 发明专利

JP2011119771A Led module and led light source device 有权
标题翻译： LED模块和LED光源设备
公开(公告)号：JP2011119771A
公开(公告)日：2011-06-16
申请号：JP2011054456
申请日：2011-03-11
申请人： Sharp Corp , シャープ株式会社
发明人： YAMASHITA TOKUJI , NABESAWA HIROYUKI , NISHIOKA HIROSHI , WATANABE MASAHIKO , SUMITANI KEN
IPC分类号： H01L33/62 , F21S2/00 , F21V19/00 , F21V23/00 , F21Y101/02
摘要： PROBLEM TO BE SOLVED: To provide an LED module which capable of constituting a light source device by simple wiring.
SOLUTION: An LED module 30 includes a flat insulating substrate 2; a first main terminal 3 and first sub-terminal 5 for connecting with an external circuit formed near a first surrounding of the insulating substrate 2; a second main terminal 4 and second sub-terminal 6 for connecting with an external circuit formed near a second surrounding, opposing the first surrounding of the insulating substrate 2, three or more connecting wiring 11 to 19 for connecting in series LEDs 1 which are formed on the insulating substrate 2 and are continuously located apart from each other, a plurality of LEDs 1, which are separately connected between adhered connecting wiring and are connected in the same direction in series, and first passing wiring 8, which is formed on the insulating substrate 2 and connects electrically between the sub-terminal 4 and second sub-terminal 6. A first connecting wiring 11, located on one edge side of connecting wiring, is connected to the main terminal 3, and the second connecting wiring 19, located on another edge side of the connecting wiring, is connected with the second main terminal 4.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够通过简单布线构成光源装置的LED模块。解决方案：LED模块30包括平坦绝缘基板2; 用于与在绝缘基板2的第一周围附近形成的外部电路连接的第一主端子3和第一子端子5; 第二主端子4和第二子端子6，用于与形成在绝缘基板2的第一周围的第二环绕附近形成的外部电路连接，三个或更多个连接布线11至19，用于连接形成的串联LED 1 在绝缘基板2上并且彼此连续地分开，多个LED 1分别连接在粘附的连接布线之间并且沿相同方向串联连接，并且第一通过布线8形成在绝缘基板2上基板2并且在子端子4和第二子端子6之间电连接。位于连接布线的一个边缘侧的第一连接布线11连接到主端子3，并且第二连接布线19位于连接线的另一边缘侧与第二主端子4连接。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2008293616A Erasing method for nonvolatile semiconductor memory 审中-公开
标题翻译：非易失性半导体存储器的擦除方法
公开(公告)号：JP2008293616A
公开(公告)日：2008-12-04
申请号：JP2007140024
申请日：2007-05-28
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN
IPC分类号： G11C16/02 , G11C16/04 , G11C16/06
摘要： PROBLEM TO BE SOLVED: To provide an erasing method to reliably complete erasure in consideration of an amount of decrease and increase of a threshold voltage due to collective erasure and due to restorative write processing. SOLUTION: All or part of a reference erasing step, which includes an erasure verifying step and a collective erasing step for all memory cells and is configured to be repeated, includes an over-erasure verifying step of determining an over-erasure state, and a restoring step of restoring the over-erasure state to an erasure state. The second and the subsequent collective erasing steps are configured to perform collective erasure using an erasure voltage pulse in which at least either of an amplitude or a pulse width of an erasure voltage pulse in the previous collective erasing step is increased, or the second and the subsequent restoring steps are configured to perform restore and write processing using a restoring and writing voltage pulse in which at least either of an amplitude or a pulse width of a restoring and writing voltage pulse in the previous restoring step is reduced. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：考虑到由于集体擦除引起的阈值电压的降低和增加以及由于恢复性写入处理而提供擦除方法以可靠地完成擦除。解决方案：包括擦除验证步骤和所有存储器单元的集体擦除步骤的全部或部分参考擦除步骤，被配置为重复，包括一个过度擦除验证步骤，用于确定过度擦除状态以及恢复步骤，其将所述过度擦除状态恢复到擦除状态。第二和随后的集体擦除步骤被配置为使用擦除电压脉冲来执行集合擦除，其中上次集合擦除步骤中的擦除电压脉冲的幅度或脉冲宽度中的至少一个增加，或者第二和后续恢复步骤被配置为使用恢复和写入电压脉冲执行恢复和写入处理，其中在先前的恢复步骤中恢复和写入电压脉冲的幅度或脉冲宽度中的至少一个被减小。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008102975A Read control circuit of semiconductor memory device 有权
标题翻译：半导体存储器件的读控制电路
公开(公告)号：JP2008102975A
公开(公告)日：2008-05-01
申请号：JP2006282194
申请日：2006-10-17
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN
IPC分类号： G11C11/413 , G11C11/41
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which complete initialization of a control circuit performing reduction of a circuit area, and timing control of a read operation and strictness of timing control can be achieved, and which performs an asynchronous read operation, coping with micronized manufacturing processes.
SOLUTION: The device is provided with: a transition detection circuit 120 for detecting transition of an address signal or a control signal and outputting the transition detection signal; a clock oscillation circuit 140 for generating an internal clock signal; a state transition circuit 130 for initializing an internal state in accordance with the transition detected signal, updating successively the internal state in accordance with the internal clock signal, and generating a plurality of read control signals and clock control signal on the basis of the internal state; and a read circuit performing read operations for a memory cell array 150 in accordance with the plurality of read control signals. A clock oscillation circuit 140 activates or diactivates at least either of oscillation operation of the internal clock signal or a signal output in accordance with the clock control signal.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体存储器件，其中可以实现执行电路区域的减少的控制电路的完整初始化以及读取操作的定时控制和定时控制的严格性，并且其执行异步阅读操作，应对微粉化制造工艺。解决方案：该装置设有：用于检测地址信号或控制信号的转变并输出转换检测信号的转移检测电路120; 用于产生内部时钟信号的时钟振荡电路140; 状态转换电路130，用于根据转换检测信号初始化内部状态，根据内部时钟信号连续更新内部状态，并根据内部状态产生多个读取控制信号和时钟控制信号 ; 以及根据多个读取控制信号对存储单元阵列150执行读取操作的读取电路。时钟振荡电路140根据时钟控制信号，激活或者去激活内部时钟信号的振荡动作或输出的信号。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2004039112A Semiconductor memory device 有权
公开(公告)号：JP2004039112A
公开(公告)日：2004-02-05
申请号：JP2002195025
申请日：2002-07-03
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN
IPC分类号： G11C16/02 , G11C7/10 , G11C16/00 , G11C16/08 , G11C16/10
CPC分类号： G11C7/1006 , G11C16/08 , G11C16/10
摘要： PROBLEM TO BE SOLVED: To control so that data stored in a page buffer circuit and needless for writing is not written in a memory cell without complicating the writing control by a WSM circuit. SOLUTION: This device is provided with a mask circuit 170 in which at least one part of data read from a page buffer circuit 120 is replaced by data for which writing operation is not performed. In a flash memory controllable by a plurality of data bus width, a multi-value flash memory provided with a page mode reading function, or the like, when data needless for writing in a memory cell is read from the page buffer circuit 120, the read data is replaced in the mask circuit 170 by data in which writing operation is not performed, thus, the data is prevented from being written into a memory cell. To judge necessity of mask, discrimination by comparing magnitude of addresses, discrimination of coincidence of addresses, the number of written data, or the like are utilized. COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2013041730A Light source module 审中-公开
标题翻译：光源模块
公开(公告)号：JP2013041730A
公开(公告)日：2013-02-28
申请号：JP2011177224
申请日：2011-08-12
申请人： Sharp Corp , シャープ株式会社
发明人： OKANO MASANOBU , ONO TAKASHI , SUMITANI KEN
IPC分类号： F21V23/06 , F21S2/00 , F21V19/00 , F21V23/00 , F21V29/00 , F21Y101/02 , G02F1/13357 , H01L33/00 , H01L33/48
摘要： PROBLEM TO BE SOLVED: To provide a light source module that can reduce manufacturing cost, improve production capacity as well as manufacturing yields, and common use of components aimed at.SOLUTION: The light source module includes a coupled substrate with a plurality of light source substrates 100 each equipped with LED elements 20, a concave part 13 as well as a convex part 14, rod terminals 15a, 15b as well as hole terminals 16a, 16b electrically and mechanically coupled, and a light guide part for guiding light emitted from the LED elements 20.
摘要翻译：要解决的问题：提供可以降低制造成本，提高生产能力以及制造产量以及针对目标的组件的常见用途的光源模块。解决方案：光源模块包括具有多个光源基板100的耦合基板，每个光源基板100配备有LED元件20，凹部13以及凸部14，杆端子15a，15b以及孔端子 16a，16b电气和机械耦合;以及导光部分，用于引导从LED元件20发射的光。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2009146482A Nonvolatile semiconductor memory device 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：JP2009146482A
公开(公告)日：2009-07-02
申请号：JP2007320745
申请日：2007-12-12
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN
IPC分类号： G11C16/02 , G11C16/06
摘要： PROBLEM TO BE SOLVED: To achieve a higher speed for erasure processing without making external control complicated in a nonvolatile semiconductor memory device provided with a plurality of memory blocks where a plurality of electrically writable and erasable nonvolatile memory cells are arranged in an array form to enable batch data erasure, and redundant blocks to replace the memory blocks. SOLUTION: This device is provided with a control circuit for determining whether defective blocks are included in a plurality of erasure object memory blocks upon reception of a redundant block replacing signal, performing control to switch the number of blocks where voltage application of erasing operation time simultaneously occurs to normal blocks so as to prevent voltage application of erasing operation time in defective blocks during an erasure operation in the normal blocks other than the defective blocks when the defective blocks are included, individually erasing the normal and redundant blocks, and performing control to simultaneously apply erasure voltages to all the erasure target memory blocks when no defective block is included. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了实现更高速度的擦除处理，而不会在设置有多个电可写和可擦除非易失性存储单元排列成阵列的多个存储块的非易失性半导体存储器件中使外部控制复杂化表单以允许批量数据擦除，以及冗余块来替换存储块。解决方案：该装置设置有控制电路，用于在接收到冗余块替换信号时确定缺陷块是否包括在多个擦除对象存储块中，执行控制以切换擦除电压的电压的数量操作时间同时发生到正常块，以便在包括缺陷块的除了缺陷块之外的正常块中的擦除操作期间防止在缺陷块中的擦除操作时间的电压施加，单独擦除正常和冗余块，并执行控制在不包含有缺陷块时同时对全部擦除对象存储块施加擦除电压。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2003015954A Semiconductor memory device and information apparatus, access period setting method for semiconductor memory device 审中-公开
标题翻译：半导体存储器件和信息装置，半导体存储器件的访问周期设置方法
公开(公告)号：JP2003015954A
公开(公告)日：2003-01-17
申请号：JP2001197537
申请日：2001-06-28
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN , FUKUI YOKO
IPC分类号： G11C11/41 , G06F12/00 , G06F12/06 , G06F12/08 , G11C7/00 , G11C7/10 , G11C7/22 , G11C8/12
CPC分类号： G11C7/1006 , G06F12/0893 , G11C7/22 , G11C8/12 , G11C2207/2245
摘要： PROBLEM TO BE SOLVED: To decrease the probability that memory control by data transfer operation competes with memory control from outside. SOLUTION: A semiconductor memory device 190 has memory blocks 130, 131 of fast write operation, a memory block 150 of slow write operation and a memory control means (switching circuits 110, 120, 140, a WSM 160 and a control bus and a data bus between them) that permits data transfer operation between one of the memory blocks 130, 131 and the memory block 150, and performs the memory operations of read/write/erase operation or the like regarding the another of the memory blocks 130, 131 based on an access operation from outside. Thus, the memory control means permits access operation for the memory blocks 130, 131 of two divided small individual storage areas respectively and independently.
摘要翻译：要解决的问题：减少通过数据传输操作的存储器控制与来自外部的存储器控制竞争的概率。解决方案：半导体存储器件190具有快速写入操作的存储块130,131，慢速写入操作的存储器块150和存储器控制装置（开关电路110,120,140，WSM 160和控制总线以及数据它们之间的总线）允许存储器块130,131和存储器块150中的一个之间的数据传送操作，并且基于存储器块130,131的另一个执行读/写/擦除操作等的存储操作在外部访问操作。因此，存储器控制装置分别和独立地允许对两个分开的小型个别存储区域的存储块130,131进行存取操作。

8. 发明专利

JP2013222499A Light source substrate unit 审中-公开
标题翻译：光源基板单元
公开(公告)号：JP2013222499A
公开(公告)日：2013-10-28
申请号：JP2012091249
申请日：2012-04-12
申请人： Sharp Corp , シャープ株式会社
发明人： OKANO MASANOBU , SUMITANI KEN
IPC分类号： F21V23/00 , F21S2/00 , F21V19/00 , F21Y101/02 , H01L33/48
CPC分类号： F21V19/002 , G02B6/0068 , G02B6/0073 , H01L25/0753 , H01L2224/48091 , H01L2224/48137 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a lighting device with improved freedom of shape and material of a resin part and increase in cost restrained, and capable of achieving improvement in both optical characteristics and physical characteristics.SOLUTION: A light source substrate unit 1 is provided with a plurality of LED chips 2, and a base material 10 having a plurality of concave parts 10a mounting the LED chips 2. The base material 10 includes a first resin part 11 formed by injection-molding of a first resin and a second resin part 12 formed by injection-molding of a second resin. The first resin part 11 and the second resin part 12 have mutually different optical characteristics, and at least a part of an inner face of each concave part 10a is formed of the second resin part 12.
摘要翻译：要解决的问题：提供一种具有树脂部件的形状和材料的自由度提高的照明装置，并且增加了成本的限制，并且能够实现光学特性和物理特性的改善。解决方案：提供了一种光源基板单元1 具有多个LED芯片2和具有安装LED芯片2的多个凹部10a的基材10.基材10包括通过注射成型第一树脂和第二树脂部分形成的第一树脂部分11 12通过注射成型第二树脂形成。第一树脂部分11和第二树脂部分12具有相互不同的光学特性，并且每个凹部10a的至少一部分内表面由第二树脂部分12形成。

9. 发明专利

JP2013171626A Light source board and light source module 审中-公开
标题翻译：光源板和光源模块
公开(公告)号：JP2013171626A
公开(公告)日：2013-09-02
申请号：JP2012033070
申请日：2012-02-17
申请人： Sharp Corp , シャープ株式会社
发明人： OKANO MASANOBU , SUMITANI KEN , KAMIYA SHINGO
IPC分类号： F21S2/00 , F21Y101/02
CPC分类号： G02B6/0073 , F21Y2103/10 , F21Y2115/10 , G02B6/0068 , G02B6/0091 , H05K1/183 , H05K2201/09118 , H05K2201/10106 , H05K2201/10977 , H05K2203/049
摘要： PROBLEM TO BE SOLVED: To provide a light source board capable of preventing defects incurred as its sealing means comes in contact with a light guide plate, and improving reliability and security, as in an edgelight type light source module.SOLUTION: A light source board 30 to 90, COB-mounting a plurality of light-emitting elements (LED elements 15) on a base material 11 for use for an edgelight type light source module, is to be structured of a first bulged part forming a dam 17 housing a sealing means, and a second bulged part 18 formed higher than the first for restraining the sealing means from contacting other members.
摘要翻译：要解决的问题：提供一种能够防止由于其密封装置与导光板接触而引起的缺陷的光源板，并且提高可靠性和安全性，如在灰浆型光源模块中。解决方案：光源板如图30至图90所示，在用于灰浆型光源模块的基材11上安装多个发光元件（LED元件15）的COB将由第一凸起部分构成，形成容纳密封件以及形成为高于第一凸起部分的第二凸起部分18，用于限制密封装置与其它部件接触。

10. 发明专利

JP2010027095A Semiconductor storage device 审中-公开
标题翻译：半导体存储设备
公开(公告)号：JP2010027095A
公开(公告)日：2010-02-04
申请号：JP2008183790
申请日：2008-07-15
申请人： Sharp Corp , シャープ株式会社
发明人： SUMITANI KEN
IPC分类号： G11C29/12 , G11C16/02
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor storage device which suppresses increase in the area of a circuit used in a test mode. SOLUTION: The device includes: a processing information setting circuit which sets processing information including a condition of voltage to be applied to a memory element, relating to respective processing operations including rewriting operation and reading operation of a stored content; a writing state machine which controls the processing operations on the basis of an external command and processing information; and one or more function circuits provided with storage circuits to be used for internal processing. In the function circuits, externally utilizable areas set in part or all of the storage areas in the storage circuits can be utilized from the outside of the circuits. The writing state machine stores, during a test mode, processing information for the test mode in the externally utilizable areas in the storage circuits in the function circuits. When carrying out the processing operations in the test mode, the writing state machine controls the operation conditions of the rewriting operation and reading operation on the basis of the processing information for the test mode stored in the storage circuits in the function circuits. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体存储装置，其抑制在测试模式中使用的电路的面积的增加。解决方案：该设备包括：处理信息设置电路，其设置包括要应用于存储器元件的电压条件的处理信息，涉及包括重写操作和存储内容的读取操作的各个处理操作; 写状态机，其基于外部命令和处理信息来控制处理操作; 以及设置有用于内部处理的存储电路的一个或多个功能电路。在功能电路中，可以从电路的外部利用设置在存储电路中的部分或全部存储区域中的外部可利用区域。写入状态机在测试模式期间存储功能电路中的存储电路中可外部使用的区域中的测试模式的处理信息。当在测试模式下执行处理操作时，写入状态机根据存储在功能电路中的存储电路中的测试模式的处理信息来控制重写操作和读取操作的操作条件。版权所有（C）2010，JPO＆INPIT

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