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1. 发明专利

JPS58119643A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS58119643A
公开(公告)日：1983-07-16
申请号：JP145082
申请日：1982-01-08
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L23/29 , H01L21/31 , H01L21/314 , H01L23/31
摘要： PURPOSE:To prevent invasion of light from a photo detecting part to active regions forming a semiconductor element by a method wherein injected light being reflected in multiple manner in a transparent insulating material is intercepted by an opaque substance. CONSTITUTION:Injected light to the photo detecting part A formed in a silicon substrate 1 is reflected on the surface of the said silicon substrate 1 through the oxide film 2, while obliquely injected light is reflected complicatedly in the said oxide film 2, and proceeds toward the circumferential circuits B. A groove is formed as to reach the silicon substrate 1 in the oxide film 2 as to surround the photo detecting part A, and the Al electrode material 4 is covered thereon. Accordingly light does not reach the P-N junction parts 3 formed in the circumferential circuits, and junction leakage in the surface or in the inside is not generated completely. Moreover as the electrode material, in addition to Al, Au Mo, polycrystalline silicon, etc., is favorable so far as it is an opaque substance.

2. 发明专利

JPS5789239A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPS5789239A
公开(公告)日：1982-06-03
申请号：JP16619080
申请日：1980-11-26
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L21/66 , H01L21/3205 , H01L21/768 , H01L21/82 , H01L23/52
摘要： PURPOSE:To improve reliability by reducing interconnection resistance as well as improving integration density for semiconductor integrated circuits where more than one polysilicon layer is used for interconnection or as capacitor or resistor, and all the polysilicon layers are made to be N type. CONSTITUTION:After producing an oxidized silicon layer 11 and a polysilicon layer 12 on a silicon substrate 10, N diffusion is made on the entire surface. Then, the N polysilicon layer 12 is patterned in a specified shape by photolithographic etching process. After this, a second polysilicon layer is laminated on the CVD-SiO2 layer 13 under the same condition as the first layer after providing a contact hole on the layer 13. As the previous procedure, N diffusion is made also on the second layer and the interconnection between two N polysilicon layers is completed by forming the second layer in a specified shape. Such construction is most suited for high density assembly of semiconductor integrated circuit because of no connecting points due to no P-N junctions on polysilicon.

3. 发明专利

JPS5643734A ANNEAL METHOD OF POLYCRYSTALLINE SILICON THIN FILM 失效
公开(公告)号：JPS5643734A
公开(公告)日：1981-04-22
申请号：JP11980379
申请日：1979-09-18
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L21/20 , H01L21/268 , H01L21/324
摘要： PURPOSE:To prevent the characteristic deterioration of a substrate accompanying the anneal by a method wherein the polycrystalline silicon surface formed on the semiconductor substrate is annealed by a laser or an electron beam to perform an etching work by a photorisography. CONSTITUTION:The diffusion region is formed on an N type silicon substrate 4 and the silicon oxidized film 5 is coated on the surface thereof, next thereto, a phosphorus doped N type polycrystalline silicon film 6 is formed, in this condition after the laser anneal is performed to reduced the resistance value of the film 6, the etching work is performed to the prescribed shape by the photolithography. According to this constitution, since a laser light is not reached to the silicon substrate, an oxidized film crack by the heat stress is not generated entirely, the diffusion layer in the substrate can be annealed in a shallow condition.

4. 发明专利

JPS5443464A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5443464A
公开(公告)日：1979-04-06
申请号：JP10966277
申请日：1977-09-12
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L21/60 , H01L21/3205 , H01L23/52
摘要： PURPOSE:To realize reduction of the vamp formation cost by utilizing the multilayer wiring material to the junction pad part and then forming through coating the vamp metal layer over the pad part. CONSTITUTION:The wiring layer is formed on field insulator film 10 of substrate 9 via the material of multi-layer wiring made of poly Si, Mo, W and the like, and then covered with protective film 11. Then a window is drilled selectively, and the vamp electrode on Ni is formed through non-electrolytic coating. In this way, the vamp formation cost can be reduced.

5. 发明专利

JPS5441071A AUTOMATIC ALIGNING METHOD OF SEMICONDUCTOR DEVICES 失效
公开(公告)号：JPS5441071A
公开(公告)日：1979-03-31
申请号：JP10818277
申请日：1977-09-08
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L21/68 , H01L21/58
摘要： PURPOSE:To make possible automatic alignment by providing magnetic layers accurately positioned to a chip or wafer surface by a simple method.

6. 发明专利

JPS5356969A PRODUCTION OF TAPE FOR TAPE CARRIER 失效
公开(公告)号：JPS5356969A
公开(公告)日：1978-05-23
申请号：JP13201676
申请日：1976-11-02
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L21/60
摘要： PURPOSE:To readily perform bonding by providing bump electrodes conducting to the wirings on other main surface on one main surface of an insulation film and wothout providing bump electrodes on elements.

7. 发明专利

JPS5284773A ELECTRONIC WATCH 失效
公开(公告)号：JPS5284773A
公开(公告)日：1977-07-14
申请号：JP104176
申请日：1976-01-06
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： G01D7/00 , G04C10/04
摘要： PURPOSE:In an analog display electronic watch having a chargeable battery, the drop in battery voltage is detected and display is made by changing the movement of a hand from that during normal time, whereby the indication of the need for charging to the user is made possible.

8. 发明专利

JPS58118118A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS58118118A
公开(公告)日：1983-07-14
申请号：JP116482
申请日：1982-01-07
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L23/29 , H01L21/31 , H01L21/314 , H01L23/31
摘要： PURPOSE:To prevent light from entering any peripheral active region thereby to eliminate the cause of leakage current, by completely surrounding the light-receiving part of a semiconductor substrate with a light-shielding wall. CONSTITUTION:A groove is formed in an Si substrate 1 so as to surround a light-receiving part A and covered with an Al electrode 4 through an oxide film 2. By this constitution, although the light obliquely incident thereon is subjected to multipath reflection in the film 2 toward peripheral circuits B, the light is reflected by the side surfaces of the Al material 4 and therefore cannot reach any peripheral circuits at all. Accordingly, no light reaches P-N junctions 3 formed in the peripheral circuits, so that no leakage current flows through the surface or inside junctions at all. In the case where the functional elements B are located at two positions, on the right and the left, and no functional element is located in regions C, it is only required to provide a pair of right and left Al electrodes 6 for a light-receiving part A.

9. 发明专利

JPS5693357A MANUFACTURE OF POLYCRYSTALLINE SILICON RESISTOR 失效
公开(公告)号：JPS5693357A
公开(公告)日：1981-07-28
申请号：JP17331879
申请日：1979-12-26
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01C17/26 , H01L21/268 , H01L21/822 , H01L27/04 , H01L27/06
摘要： PURPOSE:To increase an accuracy in controlling a resistance value by a method wherein the polycrystalline Si resistor is applied an irradiation of high energy beams of laser, electron beams, white light and the like and annealed after it being worked for a prescribed shape, covered with an insulator and electrodes being taken out of the both ends. CONSTITUTION:An SiO2 film 2 and a polycrystalline Si layer 3 are laminated and cover-attached on a surface of an Si substrate 1 on which a desired semiconductor circuit is provided, and an impurity is worked for the prescribed shape after being doped in the layer 3. Then, the whole surface of the impurity is covered with the SiO2 film 4 and situated at the end of the layer 3 and formed an opening, and electrode wirings 5 in which a material with a high melting point such as W, No, Ti and Ta are fitted at the ends of the layer 3 exposed. Thereafter, since the resistance value of the layer 3 is too high as it stands, YAG laser rays scannings and irradiations are applied to make the resistance value a prescribed value while the resistance value being measured. Thus, a confirmation precedent of the resistance value is easily made due to the application of the anneal treatment after the formation of the electrodes.

10. 发明专利

JPS5643775A PRODUCTION OF SOLAR BATTERY 失效
公开(公告)号：JPS5643775A
公开(公告)日：1981-04-22
申请号：JP11980479
申请日：1979-09-18
申请人： SUWA SEIKOSHA KK
发明人： KANO TOSHIO
IPC分类号： H01L31/04 , H01L31/20
摘要： PURPOSE:To obtain a stable PN characteristic and conversion efficiency by implanting a specific atom into a thin film silicon by ion implantation after an amorphous silicon is formed on the substrate up to a given thickness. CONSTITUTION:A lower electrode 2 is formed on a glass substrate 1 and amorphous silicons 3, 4 and 5 of P-I-N are laminated thereon. Then, atom such as H, Cl, F, Br and I is implanted from the surface by iron implantation. Following an annealing at 400 deg.C, Al is evaporated as an upper electrode 6.

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