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1. 发明专利

JPH09130253A MULTI-CHANNEL A/D CONVERTER AND DIGITAL SIGNAL PROCESSOR 失效
公开(公告)号：JPH09130253A
公开(公告)日：1997-05-16
申请号：JP30849895
申请日：1995-11-02
申请人： SONY CORP
发明人： YANARI MASAHARU , KAWAI EIJI , TAGAMI SHIGEO , KAWABE AZUMA
IPC分类号： H03M3/02
摘要： PROBLEM TO BE SOLVED: To easily adjust the gain of digital signals outputted from a multi-channel A/D converter. SOLUTION: Analog signals are converted into the digital signals by ΔΣmodulators 3a and 3b and digital decimation filters 4a and 4b, a prescribed coefficient is multiplied with the digital signals outputted from the digital decimation filters 4a and 4b in multipliers 5a and 5b and thus, the output level of the digital signals outputted from this multi-channel A/D converter is optimally adjusted.

2. 发明专利

JPH1065548A SIGNAL PROCESSING UNIT 失效
公开(公告)号：JPH1065548A
公开(公告)日：1998-03-06
申请号：JP22130696
申请日：1996-08-22
申请人： SONY CORP
发明人： TAGAMI SHIGEO , YANARI MASAHARU
IPC分类号： G10L19/00 , G11B20/10 , H03M3/02 , H03M7/32 , G10L9/18
摘要： PROBLEM TO BE SOLVED: To provide a signal processing unit in which a silence signal is detected by using 1-bit digital audio data having only a positive maximum value and a negative maximum value and an output is muted to improve the S/N. SOLUTION: A discrimination circuit 12 discriminates coincidence of patterns of two preceding and succeeding frames in 8-bit length which are blocked by shift registers 10, 11 as preceding and succeeding frames for each, e.g. 8-sample (8-bit) and whether or not an integral value of each frame is, e.g. 4. A counter 13 counts cases that the two preceding and succeeding frame patterns are coincident and the integral value of each frame is 4 based on the discrimination result of the discrimination circuit 12. A count value discrimination circuit 14 discriminates whether or not the count of the counter 13 is consecutive for 300ms or over. A mute circuit 6 mutes an analog audio signal via a D/A converter 4, a filter and amplifier 5 based on the discrimination result of the count value discrimination circuit 14.

3. 发明专利

JP2002344663A INFORMATION DISTRIBUTION SYSTEM 失效
公开(公告)号：JP2002344663A
公开(公告)日：2002-11-29
申请号：JP2001147804
申请日：2001-05-17
申请人： SONY CORP
发明人： YANARI MASAHARU
IPC分类号： G06Q30/02 , G06F13/00 , G06Q30/06 , G06Q50/00 , H04M3/493 , H04M11/08 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To provide an information distribution system that can distribute notice service information the type of which is selected by a user under a distribution condition designated by the user. SOLUTION: When a user uses a mobile information terminal to enter a preference selection signal to designate 'Gourmet information of Japanese foods' of advertisement information and a distribution time signal desigreating distribution time of 12:00 a.m. as a distribution time condition of advertisement information in advance, a display device or a speaker of the mobile information terminal 2 displays or sounds the 'Gourmet information of Japanese foods' in an information providing area on the basis of a current position of the mobile information terminal 2 carried by the user at 12:00 a.m. and transmitted from an information distributor 1, the user can receive the 'Gourmet information of Japanese foods' whose type is designated in advance under a reception atmosphere at 12: 00 a.m. which is optimum to the user, the user finds out a sushi shop A meeting the request of the user in the vicinity of the current position of the user based on the received 'Gourmet information of Japanese foods' and the user can have good lunchtime by sushi foods in matching with the preference of the user.

4. 发明专利

JPH09139675A A/D CONVERTER, DIGITAL SIGNAL PROCESSOR AND DIGITAL RECORDER 失效
公开(公告)号：JPH09139675A
公开(公告)日：1997-05-27
申请号：JP31850895
申请日：1995-11-14
申请人： SONY CORP
发明人： TAGAMI SHIGEO , KAWAI EIJI , YANARI MASAHARU , KAWABE AZUMA
IPC分类号： H03M1/08 , H03M3/02
摘要： PROBLEM TO BE SOLVED: To attain an excellent S/N in the case of an output of a digital signal with a small to medium level. SOLUTION: An A/D converter (3) is provided with a multiplier (8), which adjusts an output level of a digital signal in response to a gain coefficient received from a microcomputer (9). Furthermore, the digital signal with a longer bit length than that required for assuring the precision of A/D conversion is to be converted and even when a digital signal with a small to medium level is outputted, a noise level accompanying A/D conversion is reduced, resulting in preventing deteriorated S/N.

5. 发明专利

JPH09121160A A/D CONVERTER 失效
公开(公告)号：JPH09121160A
公开(公告)日：1997-05-06
申请号：JP29888895
申请日：1995-10-24
申请人： SONY CORP
发明人： TAGAMI SHIGEO , KAWAI EIJI , YANARI MASAHARU , KAWABE AZUMA
IPC分类号： G11B20/10 , H03H17/02 , H03M1/08 , H03M1/10 , H03M3/02
摘要： PROBLEM TO BE SOLVED: To output a full scale of digital signal without a distortion by amplifying the level of the digital signal after an offset voltage is removed by means of a filter device. SOLUTION: In an A/D converter, the gain of a digital decimation filter 3 is defined as 'I' and the digital signal outputted from the filter 3 is prevented from becoming a waveform which is clipped by the offset voltage V even when the level of an analog signal inputted to a ΔΣ modulator 2 is max. Then, the level of the digital signal where the offset voltage is removed by a DC cut filter 3 is amplified by a level-up circuit 6. That is, in the level-up circuit 6, the gain of the output level is adjusted so as to permit the full scale of digital signal to be the output of the A/D converter 1 when the analog signal inputted to the ΔΣmodulator 2 is max. Thus, the waveform of the digital signal is prevented from distorting.

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