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    • 7. 发明专利
    • JPH05232465A
    • 1993-09-10
    • JP3112792
    • 1992-02-19
    • SHARP KK
    • SHIMADA YASUNORITANIGUCHI KOJITANAKA HIROHISANAKAMURA HISAKAZUMITSUI SEIICHIKIMURA TADASHI
    • G02F1/1333G02B5/08G02F1/1335
    • PURPOSE:To improve the contrast of the reflection type liquid crystal display device by obtaining reflection plates having uniform light scatterability and good reflection characteristics. CONSTITUTION:This liquid crystal display device is constituted by having an insulating substrate 1b on which transparent electrodes 14 are formed, an active matrix substrate 1a which is constituted by forming pixel electrodes consisting of reflection films 5 on a substrate having many pieces of fine ruggedness including curved surface parts consisting of first films 2 having ruggedness and second films 4 formed by applying liquid on the first films 2 and curing the liquid and a liquid crystal layer 16 which is encapsulated between the insulating substrate 1b and the active matrix substrate 1a. The liquid for forming the second films 4 is applied on the first films 2 having many pieces of the fine ruggedness and curing the coating, by which the above-mentioned ruggedness having the plane parts are made into the ruggedness having the curved surface parts. The light scattering characteristic of the reflection films 5 formed thereon is thereby improved.
    • 9. 发明专利
    • ACTIVE MATRIX SUBSTRATE
    • JPH0468318A
    • 1992-03-04
    • JP18193990
    • 1990-07-09
    • SHARP KK
    • TANAKA HIROHISATANIGUCHI KOJIHISHIDA TADANORI
    • G02F1/1333G02F1/136G02F1/1362G02F1/1368
    • PURPOSE:To easily form an inter-layer insulating film in a fine shape and to eliminate a defect in insulation between a signal line and a pixel electrode by forming the inter-layer insulating film in multi-layered structure of an organic insulating film and an organic insulating film. CONSTITUTION:This active matrix substrate is equipped with the inter-layer insulating film 10 which is formed covering a switching element 13 formed on an insulating substrate 1, a contact hole 12 formed at the part of the inter- layer insulating film 10 on the output terminal of the switching element 13, and the picture element electrode 11 which is connected to the output terminal of the switching element 13 through the contact hole 12 formed on the inter- layer insulating film. The inter-layer insulating film 10 is formed in the multi- layered structure of the organic insulating film 10a of polyimide resin, etc., and the inorganic insulating film 10b of silicon oxide, etc., and the organic insulating film 10a is etched by using the inorganic insulating film 10b as an etching mask, and then the inter-layer insulating film 10 can be patterned in the fine shape. Consequently, the inter-layer insulating film 10 in the fine shape can easily be formed and an insulation defect between a signal line and a picture element electrode is eliminated.
    • 10. 发明专利
    • ACTIVE MATRIX SUBSTRATE
    • JPH03215834A
    • 1991-09-20
    • JP1154390
    • 1990-01-19
    • SHARP KK
    • HISHIDA TADANORITANAKA HIROHISA
    • G02F1/1333G02F1/1343G02F1/1345G02F1/136G02F1/1368
    • PURPOSE:To decrease the signal delay on additive capacity wirings and to obtain the display device having a high image grade by electrically connecting the adjacent additive capacity wirings to each other and taking out leader wires from the junctures at both ends of the respective additive capacity wirings. CONSTITUTION:The additive capacity wirings 2 are formed between gate bus wirings 1a and 1b. The additive capacity wirings 2 adjacent to each other are connected on the side where leader wires 21a and 21b of the gate bus wirings 1a and 1b positioned therebetween are not provided. The leader wires 22 and 22b are led out of the junctures thereof and terminals 12a and 12b for the additive capacities of the width larger than the leader wires 22a and 22b are provided at the terminals thereof. The signals corresponding to the video signals impressed to picture element electrodes are supplied through common wirings 3a and 3b of the additive capacities from both ends of the additive capacity wirings 2 and, therefore, the signal delay wirings on the additive capacity wirings 2 are decreased.