专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH06315090A PREDICTIVE CODING DEVICE 失效
公开(公告)号：JPH06315090A
公开(公告)日：1994-11-08
申请号：JP10300893
申请日：1993-04-28
申请人： SANYO ELECTRIC CO
发明人： TSUJI TAISUKE , MATSUYAMA HISASHI
IPC分类号： H04N1/41 , H04N1/417
摘要： PURPOSE:To attain the simplification and high speed of a predictive value calculation processing by simultaneously operating the calculation of a predicted value and the discrimination of prediction miss, storing the predicted value in a memory, using it at the time of the encoding of both even-numbered and odd-numbered lines, and stopping the calculation of the predicted value according to the generation of the prediction miss. CONSTITUTION:Before an encoding processing using the predicted value (TP) of the multilevel picture of a JBIG system, a TP prediction miss discriminating device 2 operates the discrimination of the TP prediction miss of higher layer 2 lines. At the same time, a TP value calculating device 12 calculates the TP value, and the predicted value is stored along encoded picture two lines in a memory means 10. When the prediction miss is not present, the predicted value is forcedly set as 2 or 3 during the encoding of the higher layer 2 lines. Also, when the prediction miss is present, the value read from the means 10 is used at the time of the encoding of both the even-numbered and odd-numbered lines by a switching device 8, and the calculation of the predicted value is stopped. Thus, the simplification and high speed of the predicted value calculation processing can be attained.

2. 发明专利

JPH06284296A HIGH COMPRESSION CODER 失效
公开(公告)号：JPH06284296A
公开(公告)日：1994-10-07
申请号：JP6992093
申请日：1993-03-29
申请人： SANYO ELECTRIC CO
发明人： MATSUYAMA HISASHI , TSUJI TAISUKE
IPC分类号： H03M7/30 , H04N1/41 , H04N7/12
摘要： PURPOSE:To form the compressor compressing a color picture at a high compression rate. CONSTITUTION:Picture data stored and read from a picture data storage means 1 to each picture element are subjected to pallet processing at a symbol data conversion means 2 and converted into symbol data and a large sized conversion table and stored in a symbol data storage means 4. A symbol table revision means 5 forms a revision table of a small size comprising only symbol data in use and revises the symbol data according to the revision table to form revision symbol data with a small revision value. A low-order plane of revised symbol data divided into bit planes are coded by a coding means 9 and stored in a coding data storage means 10 along with the revision table.

3. 发明专利

JPH05328090A MEMORY CONTROLLER FOR FACSIMILE 失效
公开(公告)号：JPH05328090A
公开(公告)日：1993-12-10
申请号：JP13250592
申请日：1992-05-25
申请人： SANYO ELECTRIC CO
发明人： TSUJI TAISUKE , HOJO YUJI , MATSUYAMA HISASHI , SHIKI YUKARI
IPC分类号： H04N1/00 , H04N1/21 , H04N1/32
摘要： PURPOSE:To continue copying without taking into account the data reception. CONSTITUTION:When a data output means 9 makes several copies of the picture data read by a picture reader 2, a communication control section 3 accepts a reception request from outside. A CPU 1 detects it to store the communication data in a temporary storage means 4, continuing copying. When the CPU 1 detects the output of a data amount detection circuit 10 detecting the storage data amount of the storage means 4 becomes higher than the prescribed threshold value, a bus switch 8 is changed over from a page memory 6 for copying to a page memory 7 for reception originals. Then, the data output means 9 temporarily stops the copying of the picture data read by the picture reader 2, and the copying of the storage data of the storage means 4 is started.

4. 发明专利

JPH0352378A FACSIMILE COMMUNICATION SYSTEM 失效
公开(公告)号：JPH0352378A
公开(公告)日：1991-03-06
申请号：JP18679189
申请日：1989-07-19
申请人： SANYO ELECTRIC CO
发明人： SANO HIROSHI , HOJO YUJI , MATSUYAMA HISASHI , TSUJI TAISUKE
IPC分类号： H04N1/32
摘要： PURPOSE:To attain re-reception from a sender side facsimile equipment without the operation of the operator by sending a retransmission request signal to the sender side facsimile equipment when a picture quality check circuit discriminates the picture quality to be deficient. CONSTITUTION:A receiver side facsimile equipment is provided with a picture quality check circuit 7 discriminating the deficiency of picture quality of a decoded picture data and when the picture quality check circuit 7 discriminates the picture quality to be deficient, a retransmission request signal is sent to an opposite facsimile equipment. On the other hand, the sender facsimile equipment stores the picture data sent to the receiver facsimile equipment into a code memory 6 and sends the picture data stored in the code memory 6 to the receiver facsimile equipment when the retransmission request signal is received, when the received picture data is decoded later and discriminated to be deficient picture quality, the receiver facsimile equipment receives again the picture data without intervention of the operator from the sender facsimile equipment.

5. 发明专利

JPS63156478A IMAGE PROCESSING CIRCUIT 失效
公开(公告)号：JPS63156478A
公开(公告)日：1988-06-29
申请号：JP30491686
申请日：1986-12-19
申请人： SANYO ELECTRIC CO
发明人： TSUJI TAISUKE , HOJO YUJI , YAMAGUCHI HIDEYA
IPC分类号： H04N1/393 , G06T3/40 , H04N1/40 , H04N1/405
摘要： PURPOSE:To perform high-speed processing without using the moving means of an optical system by varying a reference clock by using 2nd clocks whose number corresponds to a variable power rate, processing image data on a line being processed currently by data on a line in a dither pattern to be outputted next, and utilizing data on this one line. CONSTITUTION:A clock generating circuit 2 generates a write clock WCLK corresponding to the variable power rate for the reference clock CLK. A comparator 5 compares data on a line being read currently with data on a line of a dither memory 4 to be outputted next. A comparator 6, on the other hand, compares the data being read currently with data of the memory 4 to be outputted next. An address counter 3 updates and generates addresses of memories 7 and 8 where the comparison results of the comparators 5 and 6 are stored respectively in synchronization with the WCLK. Consequently, an address supplied to the memory 4 is varied according to the set variable power rate and data of the dither pattern to be outputted next is stored at the time of enlargement to compensate deficient lines with the storage contents of the memory 8, but the output of the memory 7 is thinned out as many as excessive lines at the time of reduction. Thus, enlargement and reduction in a subscanning direction are carried out and the data of the dither pattern is still unchanged at this time, so that pattern is not destroyed.

6. 发明专利

JP2001186226A FOLDING TYPE PORTABLE TELEPHONE SET 失效
公开(公告)号：JP2001186226A
公开(公告)日：2001-07-06
申请号：JP37032599
申请日：1999-12-27
申请人： SANYO ELECTRIC CO
发明人： AKAO MASAHIDE , YAMAOKA MICHIYUKI , TSUJI TAISUKE
IPC分类号： H04B1/08 , H04B1/16 , H04B1/38 , H04M1/02 , H04M1/23 , H04W88/02 , H04Q7/32
摘要： PROBLEM TO BE SOLVED: To provide a folding type portable telephone set capable of immediately showing the notice of a caller when an incoming call arrives, in the folding type portable telephone set composed by connecting a cap body case 2 to a main body case 1 in an openable and closable way. SOLUTION: In this folding type portable telephone set, a key operation surface 11 is provided on the inner surface of the main body case 1. Also, a liquid crystal display device is built-in in the cap body case 2, an inner display surface 21 facing the image display screen of the liquid crystal display device is formed on the inner surface of the case 2 and an outer display surface 22 facing the image display screen of the liquid crystal display device is also formed on the rear surface of the case 2. The display pattern of the liquid crystal display device is inverted between while the case 2 is opened and while closed, and the displayed image of the liquid crystal display device can normally be observed from either of the display surfaces 21 and 22.

7. 发明专利

JPH09271025A ERROR PROCESSING UNIT 失效
公开(公告)号：JPH09271025A
公开(公告)日：1997-10-14
申请号：JP10396096
申请日：1996-03-28
申请人： SANYO ELECTRIC CO
发明人： URANO TEN , TSUJI TAISUKE , TSUCHIKANE KOICHI , HAMAMOTO YASUHACHI
IPC分类号： H04N19/50 , H04N19/423 , H04N19/44 , H04N19/59 , H04N19/625 , H04N19/65 , H04N19/70 , H04N19/85 , H04N19/895 , H04N19/91 , H04N7/32
摘要： PROBLEM TO BE SOLVED: To obtain an excellent display image by conducting skip read processing depending on a layer on the occurrence of an error so as to conduct efficient decoding processing even in the case of occurrence of an error in the decoding processing of the MPEG. SOLUTION: A header detection section 10 detects a start course and an end course in a header of a bit stream, and on the occurrence of an error in a variable length decoding section 12, prescribed read skip processing is conducted. Furthermore, the variable length decoding section 12 decodes a variable length code and detects a data error in the bit stream. In the decoding processing of the bit stream, on the occurrence of an error, skip reading is conducted up to a decoding enable position depending on a layer of error occurrence. Thus, it is not required to stop decoding processing and efficient decode processing is conducted. Since substitute data are displayed in place of skipped data, a visually excellent display image is obtained.

8. 发明专利

JPH06319046A MATHEMATICAL ENCODING METHOD AND TRANSMITTING METHOD 失效
公开(公告)号：JPH06319046A
公开(公告)日：1994-11-15
申请号：JP10549093
申请日：1993-05-06
申请人： SANYO ELECTRIC CO
发明人： MATSUYAMA HISASHI , TSUJI TAISUKE
IPC分类号： H04N1/411
摘要： PURPOSE:To improve the encoding ratio by utilizing a state control variable which is statistically obtained. CONSTITUTION:Arithmetic encoding in a JBIG(joint bilevel image group) system employs the subtraction type encoding of a QM coder as standard encoding, introduces a multi-rate transition concept, and adaptively performs state control over multi-rate transition by regarding peripheral pixels of a pixel to be encoded as a context(CX) so that codes can widely be corresponded to various images. An arithmetic encoder 11 and a state control variable execution table area 12 are on a transmission side and an arithmetic decoder 13 and a state control variable execution area 14 are on a reception side. Each time one image ends, state control variables ST(CX) and MPS(CX) are stored in storage parts such as a memory and a hard disk while attaching labels corresponding to the attributes (text, dither, etc.) of the image and when the image begins to be encoded, the state control variables having the same attribute are loaded as initial values. Thus, the encoding method with high compressibility is obtained.

9. 发明专利

JPH05145749A SELECTIVE BINARIZING METHOD 失效
公开(公告)号：JPH05145749A
公开(公告)日：1993-06-11
申请号：JP33121891
申请日：1991-11-19
申请人： SANYO ELECTRIC CO
发明人： HOJO YUJI , MATSUYAMA HISASHI , TSUJI TAISUKE , SHIKI YUKARI
IPC分类号： H04N1/40 , G06T5/00 , H04N1/403
摘要： PURPOSE:To improve a picture quality, and to curtail the encoded data quantity by executing simple binarization to not only an outline part of a character but also its inside, at the time of selective binarization in an image area separation processing. CONSTITUTION:A black edge strength detecting part 1 detects black edge strength in the main scanning direction from a picture signal Vp and inputs it to a comparator 4. Also, to the comparator 4, a threshold Th0 is also inputted. When edge strength becomes larger than the threshold Th0, an edge detecting signal Ej is outputted. This signal Ej is latched for synchronization by a latching circuit 7, and its output is inputted to a CLR terminal of a latching circuit 3 with a clear function, and simultaneously, inputted as a latch lock to a latching circuit 2. The signal Ej which exceeds the threshold Th0 is inputted to a CLK terminal of a D flip-flop 8, and until a white variation signal Wu is inputted to a Ck terminal of the flop 8, a simple binarization period signal Sb is outputted, and a selective binarization processing is executed. In such a way, not only an outline part of a character but also its inside can be binarized.

10. 发明专利

JPH1074140A DATA TRANSFERRING METHOD DECODING DEVICE, DATA TRANSFER DEVICE, AND DATA PROCESSOR 失效
公开(公告)号：JPH1074140A
公开(公告)日：1998-03-17
申请号：JP9482297
申请日：1997-03-28
申请人： SANYO ELECTRIC CO
发明人： TSUCHIKANE KOICHI , URANO TEN , TSUJI TAISUKE , HAMAMOTO YASUHACHI
IPC分类号： G06F13/38 , G06F5/06 , G06F5/12 , H04L13/08 , H04N7/24 , H04N19/00 , H04N19/102 , H04N19/134 , H04N19/152 , H04N19/196 , H04N19/423 , H04N19/44 , H04N19/70
摘要： PROBLEM TO BE SOLVED: To surely transfer inputted data and to reduce a load of a data transfer side with respect to a data transferring method and a decoding device to be used for a method. SOLUTION: This decoding device A is provided with a CPU I/F circuit 10, an FIFO buffer 20, a post processing circuit 30, a dummy data generation circuit 40, and a buffer control circuit 50. When a flash instruction indicating a completion of data input is sent from a CPU 60 to the circuit 50, dummy data are sent out of the circuit 40 and data in the buffer 20 are saturated. Therefore an FIFO reading request is sent out of the circuit 50 to the circuit 30, which executes reading.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式