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1. 发明专利

JP2013037736A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013037736A
公开(公告)日：2013-02-21
申请号：JP2011171979
申请日：2011-08-05
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： TSUDA KOJI , KUBOTA YOSHITAKA , HIDAKA KENICHI , TAKAOKA HIROMICHI
IPC分类号： G11C13/00 , G11C17/14 , H01L27/10 , H01L27/105 , H01L45/00 , H01L49/00
CPC分类号： G11C7/24 , G06F21/75 , G06F21/79 , G11C13/0004 , G11C13/003 , G11C13/0059 , G11C17/16 , G11C2213/74 , G11C2213/79 , H01L23/5252 , H01L27/101 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To enhance tamper resistance of a semiconductor device using a resistance change type storage element.SOLUTION: The semiconductor device includes a unit cell (10) for storing 1-bit cell data and a control circuit (100). The unit cell (10) includes n resistance change type storage elements (31) (n is an integer of 2 or more). At least one of the n resistance change type storage elements (31) is an effective element (40) in which the cell data are recorded. When the cell data are read out, the control circuit (100) selects at least the effective element (40), and reads out the data recorded in the effective element (40) as cell data.
摘要翻译：要解决的问题：提高使用电阻变化型存储元件的半导体器件的防篡改性。解决方案：半导体器件包括用于存储1位单元数据的单位单元（10）和控制电路（100）。单位电池（10）包括n个电阻变化型存储元件（31）（n为2以上的整数）。 n个电阻变化型存储元件（31）中的至少一个是其中记录单元数据的有效元件（40）。当读出单元数据时，控制电路（100）至少选择有效元件（40），并且将记录在有效元件（40）中的数据读出为单元数据。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2011096736A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2011096736A
公开(公告)日：2011-05-12
申请号：JP2009246927
申请日：2009-10-27
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： KUBOTA YOSHITAKA , TSUDA KOJI , HIDAKA KENICHI , ONUMA TAKUJI , TAKAOKA HIROMICHI
IPC分类号： H01L21/82
摘要： PROBLEM TO BE SOLVED: To make a gate insulating film of an anti-fuse composed of a transistor excellent in characteristics after breakage. SOLUTION: A semiconductor device 100 includes: the anti-fuse element composed of the transistor comprising a gate 119 comprising a gate insulating film 107 formed on one surface of a substrate (P well 102), a gate electrode 108, and side walls 111 formed on both sides of the gate electrode 108, and a first source-drain region 104a and a second source-drain region 104b formed on the one surface of the P well 102 on both sides of the gate 119 respectively; and side wall contacting contacts (134) formed in the side walls 111 and electrically connected to the first source-drain region 104a and second source-drain region 104b or the gate electrode 108. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：制造由断裂后特性优异的晶体管构成的反熔丝的栅极绝缘膜。解决方案：半导体器件100包括：由包括栅极119的晶体管构成的反熔丝元件，栅极119包括形成在衬底（P阱102）的一个表面上的栅极绝缘膜107，栅电极108和侧形成在栅极电极108的两侧的壁111以及分别形成在栅极119两侧的P阱102的一个表面上的第一源极 - 漏极区域104a和第二源极 - 漏极区域104b; 和侧壁接触触点（134），其形成在侧壁111中并电连接到第一源极 - 漏极区域104a和第二源极 - 漏极区域104b或栅极电极108.版权所有（C）2011，JPO和INPIT

3. 发明专利

JP2010135435A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2010135435A
公开(公告)日：2010-06-17
申请号：JP2008307934
申请日：2008-12-02
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： KUBOTA YOSHITAKA , TAKAOKA HIROMICHI , TSUDA KOJI
IPC分类号： H01L21/82 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To obtain an electric fuse whose disconnecting position is controllable without reference to manufacturing variance. SOLUTION: A semiconductor device includes the electric fuse 100 formed on a substrate (not illustrated). The electric fuse 100 includes: a first interconnect 112 formed on one end side thereof; a second interconnect 122 formed in a layer different from a layer in which the first interconnect 112 is formed; a first via 130 provided in contact with the first interconnect 112 and the second interconnect 122 to connect those interconnects; a third interconnect 142 formed on another end side thereof, the third interconnect being formed in the same layer in which the first interconnect 112 is formed, as being separated from the first interconnect 112; and a second via 132 provided in contact with the third interconnect 142 and the second interconnect 122 to connect those interconnects, the second via being lower in resistance than the first via 130. The electric fuse 100 is disconnected by a flowing-out portion to be formed of a conductive material forming the electric fuse 100 which flows outwardly during disconnection. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了获得其断开位置是可控的电熔丝，不参考制造方差。解决方案：半导体器件包括形成在衬底（未示出）上的电熔丝100。电熔丝100包括：形成在其一端侧的第一互连112; 形成在与形成第一互连112的层不同的层中的第二互连122; 第一通孔130，其设置成与第一互连112和第二互连122接触以连接那些互连; 形成在其另一端侧的第三互连142，第三互连形成在与第一互连112分离的同一层中，第一互连112形成在其中; 以及与第三互连142和第二互连122接触以连接这些互连的第二通孔132，第二通孔的电阻比第一通孔130低。电熔丝100被流出部分断开以成为由形成断线时向外流动的电熔丝100的导电材料形成。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2012079942A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2012079942A
公开(公告)日：2012-04-19
申请号：JP2010224193
申请日：2010-10-01
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： ONUMA TAKUJI , HIDAKA KENICHI , TAKAOKA HIROMICHI , KUBOTA YOSHITAKA , TSUDA KOJI , ISHIGE SEIICHI
IPC分类号： H01L27/10 , H01L21/82
CPC分类号： H01L27/11206 , G11C17/16 , H01L23/5252 , H01L27/0207 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To prevent written information from being analyzed even if a method to analyze whether or not charge-up to an electrode occurs is used in an anti-fuse.SOLUTION: An anti-fuse 12 has a gate insulation film, a gate electrode 114, and a first diffusion layer 116. A second diffusion layer 126 is spaced apart from the first diffusion layer 116 through an element isolation film 102 and has the same conductivity type as the first diffusion layer 116. A gate wiring 124 is integrally formed with the gate electrode 114 and extends on an element isolation film 102. A common contact 220 connects the gate wiring 124 with the second diffusion layer 126. The gate electrode 114 is formed by a semiconductor, for example polysilicon, in which an impurity having the same conductivity type as the first diffusion layer 116 is introduced. Further, the second diffusion layer 126 is connected only to the common contact 220.
摘要翻译：要解决的问题：为了防止写入信息被分析，即使在分析是否对电极进行充电的方法进行分析时，使用反熔丝。反熔丝12具有栅极绝缘膜，栅电极114和第一扩散层116.第二扩散层126通过元件隔离膜102与第一扩散层116间隔开，并具有与第一扩散层116具有相同的导电类型。栅极布线124与栅电极114一体地形成并在元件隔离膜102上延伸。公共接触220将栅极布线124与第二扩散层126连接。栅极电极114由其中引入具有与第一扩散层116相同的导电类型的杂质的半导体形成，例如多晶硅。此外，第二扩散层126仅连接到公共接触220.版权所有（C）2012，JPO和INPIT

5. 发明专利

JP2012043970A Semiconductor device, method of writing to memory device, method of reading from the memory device, and method of manufacturing the semiconductor device 有权
标题翻译：半导体器件，写入存储器件的方法，从存储器件读取的方法以及制造半导体器件的方法
公开(公告)号：JP2012043970A
公开(公告)日：2012-03-01
申请号：JP2010183667
申请日：2010-08-19
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： TAKAOKA HIROMICHI , HIDAKA KENICHI , TSUDA KOJI , ISHIGE SEIICHI , KUBOTA YOSHITAKA , ONUMA TAKUJI
IPC分类号： H01L27/10 , G11C16/02 , G11C16/04 , G11C17/14
CPC分类号： H01L27/101 , G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which writing information is not analyzed even by using a method for analyzing the presence or absence of charge up to an electrode.SOLUTION: A first semiconductor element 100 is formed on a substrate and comprises a first insulating film, a first electrode, and a first diffusion layer. A second semiconductor element 200 is formed on the substrate and comprises a second insulating film, a second electrode, and a second diffusion layer. The second electrode is connected to the first electrode. One of a source and a drain of a control transistor 300 is connected to the first electrode and the second electrode, and the other of the source and the drain is connected to a bit line BL1. A gate electrode is connected to a word line WL1. A first potential control line SL1-1 is connected to the first diffusion layer and controls the potential of the first diffusion layer. A second potential control line SL1-2 is connected to the second diffusion layer and controls the potential of the second diffusion layer.
摘要翻译：要解决的问题：为了提供一种半导体器件，其中即使通过使用用于分析到电极的电荷的存在或不存在的方法也不分析写入信息。解决方案：第一半导体元件100形成在基板上，并且包括第一绝缘膜，第一电极和第一扩散层。第二半导体元件200形成在基板上，并且包括第二绝缘膜，第二电极和第二扩散层。第二电极连接到第一电极。控制晶体管300的源极和漏极之一连接到第一电极和第二电极，源极和漏极中的另一个连接到位线BL1。栅电极连接到字线WL1。第一电位控制线SL1-1连接到第一扩散层并控制第一扩散层的电位。第二电位控制线SL1-2连接到第二扩散层并控制第二扩散层的电位。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2012033221A Semiconductor memory device and program method for anti-fuse 有权
标题翻译：半导体存储器件和抗融合程序方法
公开(公告)号：JP2012033221A
公开(公告)日：2012-02-16
申请号：JP2010171125
申请日：2010-07-29
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： ONUMA TAKUJI , HIDAKA KENICHI , TAKAOKA HIROMICHI , KUBOTA YOSHITAKA , TSUDA KOJI
IPC分类号： G11C17/14 , H01L27/10
CPC分类号： G11C17/18
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device and a program method for an anti-fuse to suppress trap of a carrier electron in a gate insulation film at programming for the anti-fuse.SOLUTION: An anti-fuse consisting of an NMOS transistor or an NMOS capacitor includes a first terminal connected to a gate electrode, a second terminal connected to a diffusion layer, and a gate insulation film interposed between the gate electrode and the diffusion layer. A program circuit includes a first program circuit having first current drive capacity and conducting a first program operation, and a second program circuit having second current drive capacity larger than the first current drive capacity and conducting a second program operation after the first program operation. In the first program operation, the first program circuit breaks down the gate insulation film by applying first program voltage between the first terminal and the second terminal. In the second program operation, the second program circuit applies second program voltage lower than the first program voltage between the first terminal and the second terminal.
摘要翻译：要解决的问题：提供一种用于抗熔丝的半导体存储器件和编程方法，以在编程抗熔丝时抑制栅极绝缘膜中的载流子电子的陷阱。解决方案：由NMOS晶体管或NMOS电容器组成的反熔丝包括连接到栅电极的第一端子，连接到扩散层的第二端子和插在栅电极和扩散层之间的栅极绝缘膜层。程序电路包括具有第一电流驱动能力并进行第一编程操作的第一编程电路和具有大于第一当前驱动能力的第二电流驱动能力的第二编程电路，并且在第一编程操作之后进行第二编程操作。在第一编程操作中，第一编程电路通过在第一端子和第二端子之间施加第一编程电压来分解栅极绝缘膜。在第二编程操作中，第二编程电路在第一端子和第二端子之间施加低于第一编程电压的第二编程电压。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2011029329A Method and program of manufacturing semiconductor device and semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法和程序
公开(公告)号：JP2011029329A
公开(公告)日：2011-02-10
申请号：JP2009172246
申请日：2009-07-23
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： TSUDA KOJI , KUBOTA YOSHITAKA , TAKAOKA HIROMICHI
IPC分类号： H01L21/822 , H01L21/66 , H01L21/82 , H01L27/04
CPC分类号： H01L23/5256 , G11C17/16 , H01L22/14 , H01L22/20 , H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To enhance the reliability of a semiconductor device having a current control element which controls electrical connection between the nodes through the device breakdown while suppressing increase in the circuit scale. SOLUTION: A method of manufacturing a semiconductor device includes a step for measuring the element properties of an element property extraction pattern 30 formed on a semiconductor wafer 1, a step for extracting the measured element properties as the element properties of a current control element 20 corresponding to the element property extraction pattern 30, a step for setting the supply energy to the current control element 20 formed between nodes on the semiconductor wafer 1 based on the extracted element properties, and a step for supplying the set supply energy to the current control element and irreversibly controlling an electrical connection between the nodes through the device breakdown by the current control element. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提高具有电流控制元件的半导体器件的可靠性，该电流控制元件通过器件击穿来控制节点之间的电连接，同时抑制电路规模的增加。解决方案：制造半导体器件的方法包括测量形成在半导体晶片1上的元件特性提取图案30的元件特性的步骤，提取测量元件特性作为电流控制元件特性的步骤对应于元件特性提取模式30的元件20，基于所提取的元件特性将供给能量设定在形成在半导体晶片1上的节点之间的电流控制元件20的步骤，以及将设定的供给能量提供给电流控制元件，并且通过由电流控制元件击穿的装置不可逆地控制节点之间的电连接。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2010161122A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2010161122A
公开(公告)日：2010-07-22
申请号：JP2009001085
申请日：2009-01-06
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： KUBOTA YOSHITAKA , TSUDA KOJI , TAKAOKA HIROMICHI
IPC分类号： H01L21/82 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of reducing the percentage of cutting defective of a fuse element. SOLUTION: The semiconductor device 100 includes: an electrically fusible fuse element 10 formed of metal; a transistor 30 which supplies a current according to a cutting voltage to the fuse element 10; and a current adjusting resistance 20 which sets an operating point for starting current drive of the transistor 30. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供能够降低切断熔丝元件的缺陷的百分比的半导体器件。解决方案：半导体器件100包括：由金属形成的电熔丝保险丝元件10; 晶体管30，其将根据切割电压的电流提供给熔丝元件10; 以及电流调节电阻20，其设置晶体管30的启动电流驱动的工作点。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2011119640A Semiconductor device, and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011119640A
公开(公告)日：2011-06-16
申请号：JP2010115760
申请日：2010-05-19
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： KUBOTA YOSHITAKA , TSUDA KOJI , HIDAKA KENICHI , ONUMA TAKUJI , TAKAOKA HIROMICHI
IPC分类号： H01L21/82 , H01L21/8234 , H01L21/8238 , H01L27/06 , H01L27/092 , H01L27/10
CPC分类号： H01L27/0629 , H01L23/5252 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To improve performance of a transistor and to improve characteristics of an anti-fuse constituted of a transistor after breakdown of a gate insulating film. SOLUTION: An nMOS transistor acting as an anti-fuse element 190 is provided with an N-type channel region 112a. Although a typical nMOS transistor 194 is provided with an N-type extension region 120 and a P-type pocket region 122, the anti-fuse element 190 is not provided with the extension region or the pocket region. COPYRIGHT: (C)2011,JPO&INPIT

10. 发明专利

JP2011023391A Electronic component device and method of manufacturing change component 审中-公开
标题翻译：电子元件设备及其制造方法
公开(公告)号：JP2011023391A
公开(公告)日：2011-02-03
申请号：JP2009164576
申请日：2009-07-13
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： KUBOTA YOSHITAKA , TSUDA KOJI , TAKAOKA HIROMICHI
IPC分类号： H01L21/82 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To change an electric connection state with high quality against production variation.
SOLUTION: An electronic component device 200 includes an electric fuse 101 including a first fuse unit 100a including a first fuse element 102a and a second fuse unit 100b including a second fuse element 102b, and a determination circuit 150 which determines that the electric fuse 101 is electrically disconnected when at least one of the first fuse element 102a and second fuse element 102b is electrically disconnected. The first fuse unit 100a and the second fuse unit 100b are applied with currents independently of each other, and configured to have different suitable ranges of control parameters influencing rates of no change in electric connection state when applied with predetermined currents or voltages, or to be disconnected with currents differing in value.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：以高品质改变电连接状态与生产变化。解决方案：电子部件装置200包括电熔丝101，电熔丝101包括包括第一熔丝元件102a的第一熔丝单元100a和包括第二熔丝元件102b的第二熔丝单元100b;以及确定电路150，其确定电当第一熔丝元件102a和第二熔丝元件102b中的至少一个电断开时，熔断器101电断开。第一熔丝单元100a和第二熔丝单元100b彼此独立地施加电流，并且被配置为当施加预定电流或电压时具有影响电连接状态的变化率的控制参数的不同合适范围，或者被设置为与电流不同的电流断开。版权所有（C）2011，JPO＆INPIT

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