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1. 发明专利

JP2007074001A Semiconductor device 审中-公开
公开(公告)号：JP2007074001A
公开(公告)日：2007-03-22
申请号：JP2006339318
申请日：2006-12-18
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： KAMISHIRO IWAMICHI , KIKUCHI SAKAE , NUNOKAWA YASUHIRO , KONDO SHIZUO , ADACHI TETSUAKI
IPC分类号： H01L21/60
CPC分类号： H01L24/05 , H01L24/06 , H01L2224/04042 , H01L2224/05 , H01L2224/05554 , H01L2224/48 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/49 , H01L2224/49175 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/1306 , H01L2924/13091 , H01L2924/15153 , H01L2924/1517 , H01L2924/19105 , H01L2924/19107 , H01L2924/30107 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can be miniaturized. SOLUTION: In the semiconductor device, a semiconductor chip 5 in which a plurality of amplification means are formed is mounted at one main surface of a wiring board 1, and the electrode of the semiconductor chip is electrically connected to that of the wiring board with a wire. In the semiconductor device, an electrode 2C for bonding at a substrate side to which a wire 7C fixed to reference potential is connected, is arranged at a position far remote from one side 5X of the semiconductor chip 5, as compared with an electrode 2B for outputting at the substrate side to which a wire 7B for outputting is connected. An electrode 2A for inputting at the substrate side to which a wire 7A for inputting is connected, is arranged at a position where distance from one side 5X of the semiconductor chip 5 becomes nearly identical to that of the electrode 2B for outputting at the substrate side, or at a position far remote from one side 5X of the semiconductor chip 5 as compared with the electrode 2C for bonding at the substrate side. COPYRIGHT: (C)2007,JPO&INPIT

2. 发明专利

JP2010016396A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2010016396A
公开(公告)日：2010-01-21
申请号：JP2009205653
申请日：2009-09-07
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： KAMISHIRO IWAMICHI , KIKUCHI SAKAE , NUNOKAWA YASUHIRO , KONDO SHIZUO , ADACHI TETSUAKI
IPC分类号： H01L21/60
CPC分类号： H01L24/06 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/49 , H01L2224/49113 , H01L2224/49175 , H01L2224/49433 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/1306 , H01L2924/13091 , H01L2924/15153 , H01L2924/1517 , H01L2924/19105 , H01L2924/19107 , H01L2924/30107 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device aiming at miniaturization while suppressing deterioration of high frequency characteristics. SOLUTION: A semiconductor chip 5 mounted on the main surface of a wiring board 1 includes a chip side input electrode 6A electrically connected to the input part of a first amplifying means PW1, and a chip side output electrode 6B electrically connected to the output part of a second amplifying means PW2, the wiring board 1 has a board side input electrode 2A and a board side output electrode 2B on the main surface, the output part of the first amplifying means PW1 is electrically connected to the input part of the second amplifying means PW2, the chip side input electrode 6A is electrically connected to the board side input electrode 2A by an input wire 7A, the chip side input electrode 6B is electrically connected to the board side output electrode 2B by an output wire 7B, the input wire 7A is formed so as to straddle one side of a pair of the first sides forming the flat shape of the semiconductor chip 5, and the output wire 7B is formed so as to straddle one side of a pair of second sides. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种旨在小型化的半导体器件，同时抑制高频特性的劣化。解决方案：安装在布线板1的主表面上的半导体芯片5包括：电连接到第一放大装置PW1的输入部分的芯片侧输入电极6A和电连接到第一放大装置PW1的芯片侧输出电极6B 第二放大装置PW2的输出部分，布线板1在主表面上具有板侧输入电极2A和基板侧输出电极2B，第一放大装置PW1的输出部分电连接到第二放大装置PW2，芯片侧输入电极6A通过输入导线7A电连接到基板侧输入电极2A，芯片侧输入电极6B通过输出导线7B与板侧输出电极2B电连接，输入线7A形成为跨越形成半导体芯片5的平坦形状的一对第一侧的一侧，并且输出线7B形成为跨越一对线的一侧 cond侧。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2007074000A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007074000A
公开(公告)日：2007-03-22
申请号：JP2006339316
申请日：2006-12-18
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： KAMISHIRO IWAMICHI , KIKUCHI SAKAE , NUNOKAWA YASUHIRO , KONDO SHIZUO , ADACHI TETSUAKI
IPC分类号： H01L21/60
CPC分类号： H01L24/06 , H01L24/05 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/49 , H01L2224/49175 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/1306 , H01L2924/13091 , H01L2924/15153 , H01L2924/1517 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can be miniaturized. SOLUTION: In the semiconductor device, a semiconductor chip 5 in which a plurality of amplification means are formed is mounted at one main surface of a wiring board 1, and the electrode of the semiconductor chip is electrically connected to that of the wiring board with a wire. In the semiconductor device, an electrode 2C for bonding at a substrate side to which a wire 7C fixed to reference potential is connected, is arranged at a position far remote from one side 5X of the semiconductor chip 5, as compared with an electrode 2B for outputting at the substrate side to which a wire 7B for outputting is connected. An electrode 2A for inputting at the substrate side to which a wire 7A for inputting is connected, is arranged at a position where distance from one side 5X of the semiconductor chip 5 becomes nearly identical to that of the electrode 2B for outputting at the substrate side, or at a position far remote from one side 5X of the semiconductor chip 5 as compared with the electrode 2C for bonding at the substrate side. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供可以小型化的半导体器件。解决方案：在半导体器件中，其中形成有多个放大装置的半导体芯片5安装在布线板1的一个主表面上，半导体芯片的电极与布线的电极电连接用电线板。在半导体装置中，与用于固定参考电位的导线7C连接的基板侧的用于接合的电极2C被布置在远离半导体芯片5的一侧5X的位置，与用于在连接用于输出的导线7B的基板侧输出。用于在基板侧输入用于输入用导线7A的基板侧的电极2A配置在距离半导体芯片5的一侧5X的距离与用于在基板侧输出的电极2B的距离几乎相同的位置，或者与用于在基板侧接合的电极2C相比，远离半导体芯片5的一侧5X的位置。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2004253821A Hybrid integrated circuit device 审中-公开
标题翻译：混合集成电路设备
公开(公告)号：JP2004253821A
公开(公告)日：2004-09-09
申请号：JP2004170999
申请日：2004-06-09
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： NUMANAMI MASAHITO , TSUCHIYA KATSUJI , ENDO TSUNEO , NUNOKAWA YASUHIRO , KAMISHIRO IWAMICHI , ADACHI TETSUAKI , SUDO KAZUO
IPC分类号： H01L25/00
CPC分类号： H01L2224/32225 , H01L2224/48091 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2224/73265 , H01L2924/181 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a small-size radiofrequency power module which can reduce a packaging area.
SOLUTION: Hybrid integrated circuit device has a cryogenic calcination multilayer interconnection board, at least one or more active components(FET chip) and passive components which are loaded on major faces of the multilayer interconnection board, a conductive wire for connecting an electrode of the active components with a wiring(Ag-Pt) of the multilayer interconnection board, a cap fixed to the multilayer interconnection board so as to cover the major faces of the multilayer interconnection board, and plural multilayer-interconnected electrode terminals which are mounted on a rear face of the multilayer interconnection board. A lower part of the multilayer interconnection board has a strip line structure, and an upper part of the multilayer interconnection board has a microstrip line structure. A ground wiring has a network structure. A semiconductor chip is fixed to a hollow provided on the major faces of the multilayer interconnection board, and the height of the electrode surface of the semiconductor chip is set to be almost the same as the height of the wiring surface of the multilayer interconnection board. A thermal via is provided under the semiconductor chip.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供可以减少包装面积的小型射频功率模块。解决方案：混合集成电路器件具有低温煅烧多层互连板，负载在多层互连板的主面上的至少一个或多个有源部件（FET芯片）和无源部件，用于连接电极的导线的有源部件与多层互连板的布线（Ag-Pt），固定到多层互连板以覆盖多层互连板的主面的盖，以及安装在多层互连板上的多个多层互连电极端子多层互连板的背面。多层互连板的下部具有带状线结构，多层互连板的上部具有微带线结构。接地线具有网络结构。将半导体芯片固定到设置在多层互连板的主面上的中空部分，并且将半导体芯片的电极表面的高度设置为与多层互连板的布线面的高度几乎相同。在半导体芯片下方设有热通孔。版权所有（C）2004，JPO＆NCIPI

5. 发明专利

JP2007088220A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2007088220A
公开(公告)日：2007-04-05
申请号：JP2005275389
申请日：2005-09-22
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： NISHI TAKAHIRO , SUDO KAZUO , SATO TAKESHI , DEURA AKIRA , KAMISHIRO IWAMICHI , ONO HIROSHI , KIKUCHI SAKAE , NIITSU TOSHIJI , ITO MAMORU
IPC分类号： H01L21/60
CPC分类号： H01L24/73 , H01L2224/0401 , H01L2224/05624 , H01L2224/13099 , H01L2224/16 , H01L2224/32225 , H01L2224/45 , H01L2224/45144 , H01L2224/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48465 , H01L2224/48471 , H01L2224/48475 , H01L2224/48624 , H01L2224/48992 , H01L2224/48997 , H01L2224/73265 , H01L2224/78 , H01L2224/78301 , H01L2224/7855 , H01L2224/85 , H01L2224/85051 , H01L2224/85148 , H01L2224/85181 , H01L2224/85201 , H01L2224/85203 , H01L2224/85205 , H01L2224/85947 , H01L2224/85951 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/13091 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/48455
摘要： PROBLEM TO BE SOLVED: To improve the connection reliability of a semiconductor chip using wire bonding technology.
SOLUTION: A ball bonding operation 21a is carried out as a first connection 21 using a ball formed on the tip of a capillary at the side of a semiconductor chip 15a. A thermocompression bonding operation 22a that crushes and fixes the wire by pressure with the tip of the capillary is carried out as a second connection 22 at the side of a semiconductor chip 15b. Thereafter, a ball is formed on the tip of the capillary at the side of the second connection 22, and a ball bonding operation 22b is carried. As mentioned above, the ball bonding operation 22b is carried out last, whereby the thermocompression bonding 22a is improved in strength.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：使用引线接合技术提高半导体芯片的连接可靠性。解决方案：使用形成在半导体芯片15a侧的毛细管尖端上的球作为第一连接21进行球接合操作21a。作为在半导体芯片15b一侧的第二连接22，进行利用毛细管的顶端压力而将电线破碎并固定的热压接操作22a。此后，在第二连接22侧的毛细管的尖端上形成球，并且承载球接合操作22b。如上所述，最后进行球接合操作22b，从而提高热压接22a的强度。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2006269976A Method for manufacturing electronic device and multilayer wiring board 审中-公开
标题翻译：制造电子器件和多层布线器的方法
公开(公告)号：JP2006269976A
公开(公告)日：2006-10-05
申请号：JP2005089499
申请日：2005-03-25
申请人： Hitachi Hybrid Network Co Ltd , Renesas Technology Corp , 日立ハイブリッドネットワーク株式会社 , 株式会社ルネサステクノロジ
发明人： SUDO KAZUO , KAMISHIRO IWAMICHI , DEURA AKIRA , NISHI TAKAHIRO
IPC分类号： H01L25/00 , H01L23/12
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a technology capable of improving a characteristic of an electronic device. SOLUTION: After a plurality of second through-holes 4e for a thermal via holes 4g are formed after closely laminating a plurality of green sheets 4c, thermal via holes 4g are formed by filling conductors 4h into the holes 4e, and after that, a ceramic multilayer wiring board 4 formed by a heat treatment is prepared. As there is no displacement of the holes 4g in each layer of the board 4 by assembling an RF module (the electronic device) with semiconductor chips and chip components mounted on the board 4, a narrow heat-transfer-path from the semiconductor chips can be eliminated to suppress variations in heat resistance in each board 4. Accordingly, variations in the electrical characteristic of the RF module are lowered to improve the characteristic. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供能够改善电子设备的特性的技术。解决方案：在紧密层叠多个生坯4c之后形成多个用于热通孔4g的第二通孔4e，通过将导体4h填充到孔4e中而形成热通孔4g，之后制备通过热处理形成的陶瓷多层布线基板4。由于通过将RF模块（电子设备）与安装在板4上的半导体芯片和芯片组件组装在一起，板4的每层中的孔4g没有位移，所以来自半导体芯片的狭窄的热传递路径被消除以抑制每个板4中的耐热性的变化。因此，降低RF模块的电特性的变化以提高特性。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2005197389A Semiconductor module 审中-公开
标题翻译：半导体模块
公开(公告)号：JP2005197389A
公开(公告)日：2005-07-21
申请号：JP2004000913
申请日：2004-01-06
申请人： Hitachi High-Tech De Technology Co Ltd , Renesas Technology Corp , 日立ハイテクデーイーテクノロジー株式会社 , 株式会社ルネサステクノロジ
发明人： FUJII NORIKAZU , KAMISHIRO IWAMICHI , YOSHIOKA FUMITAKA , ARAI REIICHI
IPC分类号： H05K3/46 , H01L23/12 , H01L25/04 , H01L25/18
CPC分类号： H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2924/181 , H01L2924/19105 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To prevent the occurrence of crack when an impact force is given to a multilayer board.
SOLUTION: The peripheral part of a board that is formed by stacking an insulating layer and a conductive layer is a part mounting inhibition area, and electronic components are mounted in an inner part mounting area excluding the peripheral part. In such a semiconductor module, a rectangular and annular reinforcing part is stacked and formed in the peripheral part of the board. Thus, the strength of the end surface of the board that may cause cracking can be improved and the occurrence of crack can be prevented beforehand.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了防止当向多层板施加冲击力时发生裂纹。解决方案：通过堆叠绝缘层和导电层形成的板的外围部分是部件安装禁止区域，并且电子部件安装在除了周边部分之外的内部安装区域中。在这样的半导体模块中，矩形和环形增强部分堆叠并形成在板的周边部分中。因此，可以提高可能引起开裂的板的端面强度，并且可以预先防止裂纹的发生。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2005197342A Semiconductor module 审中-公开
标题翻译：半导体模块
公开(公告)号：JP2005197342A
公开(公告)日：2005-07-21
申请号：JP2004000291
申请日：2004-01-05
申请人： Hitachi High-Tech De Technology Co Ltd , Hitachi Hybrid Network Co Ltd , Renesas Technology Corp , 日立ハイテクデーイーテクノロジー株式会社 , 日立ハイブリッドネットワーク株式会社 , 株式会社ルネサステクノロジ
发明人： NIITSU TOSHIJI , KAMISHIRO IWAMICHI , YOSHIOKA FUMITAKA , ONO HIROSHI
IPC分类号： H05K1/18 , H01L23/12 , H01L25/04 , H01L25/18 , H05K3/46
CPC分类号： H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L2924/181 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To prevent the positional displacement of an electronic part arranged at the end of a multilayer substrate.
SOLUTION: In a semiconductor module mounting the electronic part in a part loading region on the inside excepting the peripheral section of the part loading surface of the multilayer substrate constituted by alternately laminating insulating layers and conductor layers, the thickness of the insulating layer in the part loading region is thinned to the peripheral section, and a recessed section is formed in the insulating layer as an uppermost layer as the part loading surface of the multilayer substrate. Since the positional displacement of the electronic part can be prevented by forming the recessed section, a part-loading inhibiting region is shrunk and the semiconductor module can be miniaturized.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了防止布置在多层基板的端部的电子部件的位置偏移。解决方案：在将交替层叠绝缘层和导体层构成的多层基板的部分装载面的周边部分之外的部分装载区域中的电子部件安装在半导体模块中时，绝缘层的厚度在部分加载区域中减薄到周边部分，并且在作为多层基板的部件加载表面的最上层的绝缘层中形成凹部。由于可以通过形成凹部来防止电子部件的位置偏移，所以部件负载禁止区域被收缩，并且可以使半导体模块小型化。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2007088363A Electronic equipment 审中-公开
标题翻译：电子设备
公开(公告)号：JP2007088363A
公开(公告)日：2007-04-05
申请号：JP2005277960
申请日：2005-09-26
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： DEURA AKIRA , ONO IKUYUKI , KOZU TADASHI , TANIMOTO TAKUMA , KAMISHIRO IWAMICHI , KIKUCHI SAKAE , MORIYAMA SHINJI
IPC分类号： H01F27/06 , H01L23/12
CPC分类号： H01L2224/32225 , H01L2224/45015 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00011 , H01L2924/1305 , H01L2924/13091 , H01L2924/19105 , H01L2924/19107 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2924/207 , H01L2924/01033
摘要： PROBLEM TO BE SOLVED: To improve the performance of a power amplification module by reducing the influence exerted by magnetic flux generated with an air coil on interconnect lines of the interior or the front surface of a wiring board. SOLUTION: The RF power module 1 as an electronic equipment mounts semiconductor chips, passive components, and an air coil 6 on a wiring board 3; and seals them with sealant resin. The RF power module 1 has two systems of a power amplification circuit, and each of the power amplification circuit is configured so as to be possible to amplify signals of multiple bands. The air coil 6 is used in an output matching circuit. The air coil 6 of surface mount type comprises a coil 6a which coils a conductor wire 31 more than once, and two terminals 6b composed of the conductor wire 31 connected respectively to the both ends of the coil 6a. The conductor wire 31 comprising the coil 6a is covered by an insulating film, and the conductor wire 31 comprising the each terminals 6b with the insulating film removed therein is connected through a solder 32 to the board side terminal 12a which is in a position distant from the coil 6a, extending therethrough in the direction apart from the coil 6a. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过减少由空气线圈产生的磁通量对布线板的内部或前表面的布线的影响而提高功率放大模块的性能。解决方案：作为电子设备的RF功率模块1将半导体芯片，无源部件和空气线圈6安装在布线板3上; 并用密封胶密封。 RF功率模块1具有功率放大电路的两个系统，并且每个功率放大电路被配置为可以放大多个频带的信号。空气线圈6用于输出匹配电路。表面安装型的空气线圈6包括一个线圈6a，其不止一次地缠绕导体线31，以及两个由分别连接到线圈6a两端的导线31构成的端子6b。包括线圈6a的导线31被绝缘膜覆盖，并且包括其中去除了绝缘膜的每个端子6b的导体线31通过焊料32连接到位于远离的位置的板侧端子12a 线圈6a沿着与线圈6a分离的方向延伸穿过。版权所有（C）2007，JPO＆INPIT

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